diff options
Diffstat (limited to 'src/test/scala/firrtlTests')
| -rw-r--r-- | src/test/scala/firrtlTests/StringSpec.scala | 7 | ||||
| -rw-r--r-- | src/test/scala/firrtlTests/UnitTests.scala | 38 |
2 files changed, 41 insertions, 4 deletions
diff --git a/src/test/scala/firrtlTests/StringSpec.scala b/src/test/scala/firrtlTests/StringSpec.scala index 04bc663e..62634c44 100644 --- a/src/test/scala/firrtlTests/StringSpec.scala +++ b/src/test/scala/firrtlTests/StringSpec.scala @@ -109,13 +109,12 @@ class StringSpec extends FirrtlPropSpec { } // Generators for random testing - val validChar = for (c <- Gen.choose(0x20.toChar, 0x7e.toChar) if c != '\\') yield c + val validChar = Gen.oneOf((0x20.toChar to 0x5b.toChar).toSeq ++ + (0x5e.toChar to 0x7e.toChar).toSeq) // exclude '\\' val validCharSeq = Gen.containerOf[Seq, Char](validChar) val invalidChar = Gen.oneOf(Gen.choose(0x00.toChar, 0x1f.toChar), Gen.choose(0x7f.toChar, 0xff.toChar)) - val invalidEsc = for ( - c <- Gen.choose(0x00.toChar, 0xff.toChar - ) if (!validEsc.contains(c))) yield c + val invalidEsc = Gen.oneOf((0x00.toChar to 0xff.toChar).toSeq diff validEsc) property("Random invalid strings should fail") { forAll(validCharSeq, invalidChar, validCharSeq) { diff --git a/src/test/scala/firrtlTests/UnitTests.scala b/src/test/scala/firrtlTests/UnitTests.scala index ead55755..bc8db897 100644 --- a/src/test/scala/firrtlTests/UnitTests.scala +++ b/src/test/scala/firrtlTests/UnitTests.scala @@ -194,4 +194,42 @@ class UnitTests extends FirrtlFlatSpec { val check = Seq("c <= mux(pred, a, pad(b, 32))") executeTest(input, check, passes) } + "Indexes into sub-accesses" should "be dealt with" in { + val passes = Seq( + ToWorkingIR, + ResolveKinds, + InferTypes, + ResolveGenders, + InferWidths, + PullMuxes, + ExpandConnects, + RemoveAccesses + ) + val input = + """circuit AssignViaDeref : + | module AssignViaDeref : + | input clk : Clock + | input reset : UInt<1> + | output io : {a : UInt<8>, sel : UInt<1>} + | + | io is invalid + | reg table : {a : UInt<8>}[2], clk + | reg otherTable : {a : UInt<8>}[2], clk + | otherTable[table[UInt<1>("h01")].a].a <= UInt<1>("h00")""".stripMargin + //TODO(azidar): I realize this is brittle, but unfortunately there + // isn't a better way to test this pass + val check = Seq( + """wire GEN_0 : { a : UInt<8>}""", + """GEN_0.a <= table[0].a""", + """when eq(UInt<1>("h1"), UInt<1>("h1")) :""", + """GEN_0.a <= table[1].a""", + """wire GEN_1 : UInt<8>""", + """when eq(UInt<1>("h0"), GEN_0.a) :""", + """otherTable[0].a <= GEN_1""", + """when eq(UInt<1>("h1"), GEN_0.a) :""", + """otherTable[1].a <= GEN_1""", + """GEN_1 <= UInt<1>("h0")""" + ) + executeTest(input, check, passes) + } } |