1 files changed, 2 insertions, 2 deletions
diff --git a/src/test/scala/firrtlTests/RemoveWiresSpec.scala b/src/test/scala/firrtlTests/RemoveWiresSpec.scala
index e6b60059..df3ceef6 100644
--- a/src/test/scala/firrtlTests/RemoveWiresSpec.scala
+++ b/src/test/scala/firrtlTests/RemoveWiresSpec.scala
@@ -37,7 +37,7 @@ class RemoveWiresSpec extends FirrtlFlatSpec {
     circuit.modules.head match {
       case Module(_,_,_, body) => onStmt(body)
     }
-    (nodes, wires)
+    (nodes.toSeq, wires.toSeq)
   }
 
   def orderedNames(circuit: Circuit): Seq[String] = {
@@ -55,7 +55,7 @@ class RemoveWiresSpec extends FirrtlFlatSpec {
     circuit.modules.head match {
       case Module(_,_,_, body) => onStmt(body)
     }
-    names
+    names.toSeq
   }
 
   "Remove Wires" should "turn wires and their single connect into nodes" in {