diff options
Diffstat (limited to 'src/test/scala/firrtlTests/CheckCombLoopsSpec.scala')
| -rw-r--r-- | src/test/scala/firrtlTests/CheckCombLoopsSpec.scala | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/src/test/scala/firrtlTests/CheckCombLoopsSpec.scala b/src/test/scala/firrtlTests/CheckCombLoopsSpec.scala index 2c12d4ca..6c8a2f20 100644 --- a/src/test/scala/firrtlTests/CheckCombLoopsSpec.scala +++ b/src/test/scala/firrtlTests/CheckCombLoopsSpec.scala @@ -23,6 +23,31 @@ class CheckCombLoopsSpec extends SimpleTransformSpec { new MiddleFirrtlToLowFirrtl ) + "Loop-free circuit" should "not throw an exception" in { + val input = """circuit hasnoloops : + | module thru : + | input in1 : UInt<1> + | input in2 : UInt<1> + | output out1 : UInt<1> + | output out2 : UInt<1> + | out1 <= in1 + | out2 <= in2 + | module hasnoloops : + | input clk : Clock + | input a : UInt<1> + | output b : UInt<1> + | wire x : UInt<1> + | inst inner of thru + | inner.in1 <= a + | x <= inner.out1 + | inner.in2 <= x + | b <= inner.out2 + |""".stripMargin + + val writer = new java.io.StringWriter + compile(CircuitState(parse(input), ChirrtlForm, None), writer) + } + "Simple combinational loop" should "throw an exception" in { val input = """circuit hasloops : | module hasloops : |