2 files changed, 41 insertions, 1 deletions
diff --git a/src/test/scala/firrtl/stage/phases/tests/ConvertCompilerAnnotationsSpec.scala b/src/test/scala/firrtl/stage/phases/tests/ConvertCompilerAnnotationsSpec.scala
new file mode 100644
index 00000000..acd37bf5
--- /dev/null
+++ b/src/test/scala/firrtl/stage/phases/tests/ConvertCompilerAnnotationsSpec.scala
@@ -0,0 +1,40 @@
+// See LICENSE for license details.
+
+package firrtl.stage.phases.tests
+
+import firrtl.{HighFirrtlCompiler, HighFirrtlEmitter, LowFirrtlCompiler}
+import firrtl.options.{Dependency, OptionsException}
+import firrtl.stage.{CompilerAnnotation, RunFirrtlTransformAnnotation}
+import firrtl.stage.phases.ConvertCompilerAnnotations
+
+import org.scalatest.flatspec.AnyFlatSpec
+import org.scalatest.matchers.should.Matchers
+
+class ConvertCompilerAnnotationsSpec extends AnyFlatSpec with Matchers {
+
+  class Fixture {
+    val phase = new ConvertCompilerAnnotations
+  }
+
+  behavior.of(classOf[ConvertCompilerAnnotations].getName)
+
+  it should "convert a deprecated CompilerAnnotation to a RunFirrtlTransformAnnotation" in new Fixture {
+    val annotations = Seq(CompilerAnnotation(new HighFirrtlCompiler))
+    phase
+      .transform(annotations)
+      .map {
+        case RunFirrtlTransformAnnotation(a) => Dependency.fromTransform(a)
+      }
+      .toSeq should be(Seq(Dependency[HighFirrtlEmitter]))
+  }
+
+  it should "throw an exception if multiple CompilerAnnotations are specified" in new Fixture {
+    val annotations = Seq(
+      CompilerAnnotation(new HighFirrtlCompiler),
+      CompilerAnnotation(new LowFirrtlCompiler)
+    )
+    intercept[OptionsException] {
+      phase.transform(annotations)
+    }.getMessage should include("Zero or one CompilerAnnotation may be specified")
+  }
+}
diff --git a/src/test/scala/firrtl/testutils/FirrtlSpec.scala b/src/test/scala/firrtl/testutils/FirrtlSpec.scala
index a0c41085..9ee5fdaf 100644
--- a/src/test/scala/firrtl/testutils/FirrtlSpec.scala
+++ b/src/test/scala/firrtl/testutils/FirrtlSpec.scala
@@ -101,7 +101,7 @@ trait FirrtlRunners extends BackendCompilationUtilities {
         InfoModeAnnotation("ignore") +:
         RenameTopAnnotation(topName) +:
         stage.FirrtlCircuitAnnotation(circuit) +:
-        stage.CompilerAnnotation("mverilog") +:
+        stage.RunFirrtlTransformAnnotation.stringToEmitter("mverilog") +:
         stage.OutputFileAnnotation(topName) +:
         toAnnos(baseTransforms)
     }