1 files changed, 115 insertions, 19 deletions
diff --git a/src/main/stanza/ir-utils.stanza b/src/main/stanza/ir-utils.stanza
index 8cfd1541..3dd0585d 100644
--- a/src/main/stanza/ir-utils.stanza
+++ b/src/main/stanza/ir-utils.stanza
@@ -9,24 +9,6 @@ public defmulti print-debug (o:OutputStream, e:Expression|Stmt|Type|Port|Field|M
 
 ;============== GENSYM STUFF ======================
 
-public val v-keywords = to-list $ [
-    `always, `and, `assign, `attribute, `begin, `buf, `bufif0, `bufif1,
-    `case, `casex, `casez, `cmos, `deassign, `default, `defparam,
-    `disable, `edge, `else, `end, `endattribute, `endcase, `endfunction,
-    `endmodule, `endprimitive, `endspecify, `endtable, `endtask, `event,
-    `for, `force, `forever, `fork, `function, `highz0, `highz1, `if,
-    `ifnone, `initial, `inout, `input, `integer, `initvar, `join,
-    `medium, `module, `large, `macromodule, `nand, `negedge, `nmos,
-    `nor, `not, `notif0, `notif1, `or, `output, `parameter, `pmos,
-    `posedge, `primitive, `pull0, `pull1, `pulldown, `pullup, `rcmos,
-    `real, `realtime, `reg, `release, `repeat, `rnmos, `rpmos, `rtran,
-    `rtranif0, `rtranif1, `scalared, `signed, `small, `specify,
-    `specparam, `strength, `strong0, `strong1, `supply0, `supply1,
-    `table, `task, `time, `tran, `tranif0, `tranif1, `tri, `tri0,
-    `tri1, `triand, `trior, `trireg, `unsigned, `vectored, `wait,
-    `wand, `weak0, `weak1, `while, `wire, `wor, `xnor, `xor,
-    `SYNTHESIS, `PRINTF_COND, `VCS ]
-
 public defn firrtl-gensym (s:Symbol) -> Symbol :
    firrtl-gensym(s,HashTable<Symbol,Int>(symbol-hash))
 public defn firrtl-gensym (sym-hash:HashTable<Symbol,Int>) -> Symbol :
@@ -57,7 +39,7 @@ public defn firrtl-gensym (s:Symbol,sym-hash:HashTable<Symbol,Int>) -> Symbol :
 
 public defn get-sym-hash (m:InModule) -> HashTable<Symbol,Int> :
    get-sym-hash(m,list())
-public defn get-sym-hash (m:InModule,keywords:List<Symbol>) -> HashTable<Symbol,Int> :
+public defn get-sym-hash (m:InModule,keywords:Streamable<Symbol>) -> HashTable<Symbol,Int> :
    val sym-hash = HashTable<Symbol,Int>(symbol-hash)
    for k in keywords do :
       sym-hash[k] = 0
@@ -518,3 +500,117 @@ public defn pow (x:Long,y:Long) -> Long :
    x*
 
 
+;=================== VERILOG KEYWORDS =======================
+
+public val v-keywords = HashTable<Symbol,True>(symbol-hash)
+v-keywords[`always] = true
+v-keywords[`and] = true
+v-keywords[`assign] = true
+v-keywords[`attribute] = true
+v-keywords[`begin] = true
+v-keywords[`buf] = true
+v-keywords[`bufif0] = true
+v-keywords[`bufif1] = true
+v-keywords[`case] = true
+v-keywords[`casex] = true
+v-keywords[`casez] = true
+v-keywords[`cmos] = true
+v-keywords[`deassign] = true
+v-keywords[`default] = true
+v-keywords[`defparam] = true
+v-keywords[`disable] = true
+v-keywords[`edge] = true
+v-keywords[`else] = true
+v-keywords[`end] = true
+v-keywords[`endattribute] = true
+v-keywords[`endcase] = true
+v-keywords[`endfunction] = true
+v-keywords[`endmodule] = true
+v-keywords[`endprimitive] = true
+v-keywords[`endspecify] = true
+v-keywords[`endtable] = true
+v-keywords[`endtask] = true
+v-keywords[`event] = true
+v-keywords[`for] = true
+v-keywords[`force] = true
+v-keywords[`forever] = true
+v-keywords[`fork] = true
+v-keywords[`function] = true
+v-keywords[`highz0] = true
+v-keywords[`highz1] = true
+v-keywords[`if] = true
+v-keywords[`ifnone] = true
+v-keywords[`initial] = true
+v-keywords[`inout] = true
+v-keywords[`input] = true
+v-keywords[`integer] = true
+v-keywords[`initvar] = true
+v-keywords[`join] = true
+v-keywords[`medium] = true
+v-keywords[`module] = true
+v-keywords[`large] = true
+v-keywords[`macromodule] = true
+v-keywords[`nand] = true
+v-keywords[`negedge] = true
+v-keywords[`nmos] = true
+v-keywords[`nor] = true
+v-keywords[`not] = true
+v-keywords[`notif0] = true
+v-keywords[`notif1] = true
+v-keywords[`or] = true
+v-keywords[`output] = true
+v-keywords[`parameter] = true
+v-keywords[`pmos] = true
+v-keywords[`posedge] = true
+v-keywords[`primitive] = true
+v-keywords[`pull0] = true
+v-keywords[`pull1] = true
+v-keywords[`pulldown] = true
+v-keywords[`pullup] = true
+v-keywords[`rcmos] = true
+v-keywords[`real] = true
+v-keywords[`realtime] = true
+v-keywords[`reg] = true
+v-keywords[`release] = true
+v-keywords[`repeat] = true
+v-keywords[`rnmos] = true
+v-keywords[`rpmos] = true
+v-keywords[`rtran] = true
+v-keywords[`rtranif0] = true
+v-keywords[`rtranif1] = true
+v-keywords[`scalared] = true
+v-keywords[`signed] = true
+v-keywords[`small] = true
+v-keywords[`specify] = true
+v-keywords[`specparam] = true
+v-keywords[`strength] = true
+v-keywords[`strong0] = true
+v-keywords[`strong1] = true
+v-keywords[`supply0] = true
+v-keywords[`supply1] = true
+v-keywords[`table] = true
+v-keywords[`task] = true
+v-keywords[`time] = true
+v-keywords[`tran] = true
+v-keywords[`tranif0] = true
+v-keywords[`tranif1] = true
+v-keywords[`tri] = true
+v-keywords[`tri0] = true
+v-keywords[`tri1] = true
+v-keywords[`triand] = true
+v-keywords[`trior] = true
+v-keywords[`trireg] = true
+v-keywords[`unsigned] = true
+v-keywords[`vectored] = true
+v-keywords[`wait] = true
+v-keywords[`wand] = true
+v-keywords[`weak0] = true
+v-keywords[`weak1] = true
+v-keywords[`while] = true
+v-keywords[`wire] = true
+v-keywords[`wor] = true
+v-keywords[`xnor] = true
+v-keywords[`xor] = true
+v-keywords[`SYNTHESIS] = true
+v-keywords[`PRINTF_COND] = true
+v-keywords[`VCS] = true