diff options
Diffstat (limited to 'src/main/stanza/custom-passes.stanza')
| -rw-r--r-- | src/main/stanza/custom-passes.stanza | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/main/stanza/custom-passes.stanza b/src/main/stanza/custom-passes.stanza index 4904d6d1..ecd7aed1 100644 --- a/src/main/stanza/custom-passes.stanza +++ b/src/main/stanza/custom-passes.stanza @@ -3,6 +3,7 @@ defpackage firrtl/custom-passes : import verse import firrtl/ir-utils import firrtl/ir2 + import bigint ;============ When Coverage ============= public defstruct WhenCoverage <: Pass : @@ -46,7 +47,7 @@ defn when-coverage (port-name:Symbol, reg-name:Symbol, instrument?:HashTable<Sym val sym = HashTable<Symbol,Int>(symbol-hash) val w1 = IntWidth(1) val t1 = UIntType(w1) - val u1 = UIntValue(to-long $ 1,w1) + val u1 = UIntValue(BigIntLit("1"),w1) defn when-coverage (s:Stmt) -> Stmt : match(s) : (s:Conditionally) : @@ -71,7 +72,7 @@ defn when-coverage (port-name:Symbol, reg-name:Symbol, instrument?:HashTable<Sym if length(w-ls) != 0 : val reg-ref = Ref(reg-name,UIntType(IntWidth(length(w-ls)))) ;add{logic,_} $ DefRegister(FileInfo(),name(reg-ref),type(reg-ref)) TODO add clock and reset - add{logic,_} $ OnReset(FileInfo(),reg-ref,UIntValue(to-long $ 0,IntWidth(length(w-ls)))) + add{logic,_} $ OnReset(FileInfo(),reg-ref,UIntValue(BigIntLit("0"),IntWidth(length(w-ls)))) for (x in w-ls, i in 0 to false) do : add{logic,_} $ DefWire(FileInfo(),name(x),type(x)) add{logic,_} $ Connect(FileInfo(),x,DoPrim(BIT-SELECT-OP,list(reg-ref),list(i),UIntType(w1))) @@ -81,7 +82,7 @@ defn when-coverage (port-name:Symbol, reg-name:Symbol, instrument?:HashTable<Sym if length(i-ls) != 0 : for (x in i-ls, i in 0 to false) do : add{logic,_} $ DefWire(FileInfo(),name(x),type(x)) - add{logic,_} $ Connect(FileInfo(),x,UIntValue(to-long $ 0,UnknownWidth())) + add{logic,_} $ Connect(FileInfo(),x,UIntValue(BigIntLit("0"),UnknownWidth())) if instrument?[name(m)] : add{logic,_} $ Connect(FileInfo(),port-ref,concat-all(append(w-ls,i-ls))) |