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Diffstat (limited to 'src/main/stanza/custom-compiler.stanza')
| -rw-r--r-- | src/main/stanza/custom-compiler.stanza | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/stanza/custom-compiler.stanza b/src/main/stanza/custom-compiler.stanza index aa21504b..773b63ca 100644 --- a/src/main/stanza/custom-compiler.stanza +++ b/src/main/stanza/custom-compiler.stanza @@ -32,7 +32,7 @@ public defmethod passes (c:InstrumentedVerilog) -> List<Pass> : SplitExp() ToRealIR() SpecialRename(`#,`_) - CheckHighForm(`_) + CheckHighForm(expand-delin) CheckLowForm() Verilog(file(c)) ] |