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Diffstat (limited to 'src/main/stanza/compilers.stanza')
| -rw-r--r-- | src/main/stanza/compilers.stanza | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/main/stanza/compilers.stanza b/src/main/stanza/compilers.stanza index efa8c992..5a2e2278 100644 --- a/src/main/stanza/compilers.stanza +++ b/src/main/stanza/compilers.stanza @@ -56,9 +56,11 @@ public defmethod passes (c:StandardVerilog) -> List<Pass> : ExpandIndexedConnects() ExpandWhens() InferWidths() + Pad() SplitExp() ToRealIR() - SpecialRename(`#,`_) + SpecialRename(`#,`__) + SpecialRename(`$,`_) Verilog(file(c)) ] |