diff options
Diffstat (limited to 'src/main/scala/firrtl/transforms/RemoveWires.scala')
| -rw-r--r-- | src/main/scala/firrtl/transforms/RemoveWires.scala | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/src/main/scala/firrtl/transforms/RemoveWires.scala b/src/main/scala/firrtl/transforms/RemoveWires.scala index 5e6b7910..444df4b1 100644 --- a/src/main/scala/firrtl/transforms/RemoveWires.scala +++ b/src/main/scala/firrtl/transforms/RemoveWires.scala @@ -20,19 +20,17 @@ import scala.util.{Try, Success, Failure} * wires have multiple connections that may be impossible to order in a * flow-foward way */ -class RemoveWires extends Transform with PreservesAll[Transform] { - def inputForm = LowForm - def outputForm = LowForm +class RemoveWires extends Transform with DependencyAPIMigration with PreservesAll[Transform] { - override val prerequisites = firrtl.stage.Forms.MidForm ++ + override def prerequisites = firrtl.stage.Forms.MidForm ++ Seq( Dependency(passes.LowerTypes), Dependency(passes.Legalize), Dependency(transforms.RemoveReset), Dependency[transforms.CheckCombLoops] ) - override val optionalPrerequisites = Seq(Dependency[checks.CheckResets]) + override def optionalPrerequisites = Seq(Dependency[checks.CheckResets]) - override val dependents = Seq.empty + override def dependents = Seq.empty // Extract all expressions that are references to a Node, Wire, or Reg // Since we are operating on LowForm, they can only be WRefs |