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-rw-r--r--src/main/scala/firrtl/transforms/LegalizeClocks.scala16
1 files changed, 9 insertions, 7 deletions
diff --git a/src/main/scala/firrtl/transforms/LegalizeClocks.scala b/src/main/scala/firrtl/transforms/LegalizeClocks.scala
index f439fdc9..248775d9 100644
--- a/src/main/scala/firrtl/transforms/LegalizeClocks.scala
+++ b/src/main/scala/firrtl/transforms/LegalizeClocks.scala
@@ -18,8 +18,8 @@ object LegalizeClocksTransform {
// Currently only looks for literals nested within casts
private def illegalClockExpr(expr: Expression): Boolean = expr match {
case _: Literal => true
- case DoPrim(op, args, _,_) if isCast(op) => args.exists(illegalClockExpr)
- case _ => false
+ case DoPrim(op, args, _, _) if isCast(op) => args.exists(illegalClockExpr)
+ case _ => false
}
/** Legalize Clocks in a Statement
@@ -66,11 +66,13 @@ object LegalizeClocksTransform {
class LegalizeClocksTransform extends Transform with DependencyAPIMigration {
override def prerequisites = firrtl.stage.Forms.LowFormMinimumOptimized ++
- Seq( Dependency[BlackBoxSourceHelper],
- Dependency[FixAddingNegativeLiterals],
- Dependency[ReplaceTruncatingArithmetic],
- Dependency[InlineBitExtractionsTransform],
- Dependency[InlineCastsTransform] )
+ Seq(
+ Dependency[BlackBoxSourceHelper],
+ Dependency[FixAddingNegativeLiterals],
+ Dependency[ReplaceTruncatingArithmetic],
+ Dependency[InlineBitExtractionsTransform],
+ Dependency[InlineCastsTransform]
+ )
override def optionalPrerequisites = firrtl.stage.Forms.LowFormOptimized