aboutsummaryrefslogtreecommitdiff
path: root/src/main/scala/firrtl/transforms/InlineBitExtractions.scala
diff options
context:
space:
mode:
Diffstat (limited to 'src/main/scala/firrtl/transforms/InlineBitExtractions.scala')
-rw-r--r--src/main/scala/firrtl/transforms/InlineBitExtractions.scala2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/scala/firrtl/transforms/InlineBitExtractions.scala b/src/main/scala/firrtl/transforms/InlineBitExtractions.scala
index 1c49a9b2..3f2fcdcd 100644
--- a/src/main/scala/firrtl/transforms/InlineBitExtractions.scala
+++ b/src/main/scala/firrtl/transforms/InlineBitExtractions.scala
@@ -103,7 +103,7 @@ class InlineBitExtractionsTransform extends Transform with DependencyAPIMigratio
override def optionalPrerequisites = firrtl.stage.Forms.LowFormOptimized
- override def dependents = Seq.empty
+ override def optionalPrerequisiteOf = Seq.empty
def execute(state: CircuitState): CircuitState = {
val modulesx = state.circuit.modules.map(InlineBitExtractionsTransform.onMod(_))