diff options
Diffstat (limited to 'src/main/scala/firrtl/passes/memlib')
| -rw-r--r-- | src/main/scala/firrtl/passes/memlib/InferReadWrite.scala | 2 | ||||
| -rw-r--r-- | src/main/scala/firrtl/passes/memlib/ReplaceMemTransform.scala | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/main/scala/firrtl/passes/memlib/InferReadWrite.scala b/src/main/scala/firrtl/passes/memlib/InferReadWrite.scala index 3494de45..f524d60b 100644 --- a/src/main/scala/firrtl/passes/memlib/InferReadWrite.scala +++ b/src/main/scala/firrtl/passes/memlib/InferReadWrite.scala @@ -155,7 +155,7 @@ class InferReadWrite extends Transform with SeqTransformBased with HasScoptOptio .opt[Unit]("infer-rw") .abbr("firw") .valueName ("<circuit>") - .action( (_, c) => c ++ Seq(InferReadWriteAnnotation, RunFirrtlTransformAnnotation(new InferReadWrite)) ) + .action( (_, c) => Seq(InferReadWriteAnnotation, RunFirrtlTransformAnnotation(new InferReadWrite)) ++ c ) .maxOccurs(1) .text("Enable readwrite port inference for the target circuit") diff --git a/src/main/scala/firrtl/passes/memlib/ReplaceMemTransform.scala b/src/main/scala/firrtl/passes/memlib/ReplaceMemTransform.scala index 1f8e89be..32d83181 100644 --- a/src/main/scala/firrtl/passes/memlib/ReplaceMemTransform.scala +++ b/src/main/scala/firrtl/passes/memlib/ReplaceMemTransform.scala @@ -110,8 +110,8 @@ class ReplSeqMem extends Transform with HasScoptOptions { .opt[String]("repl-seq-mem") .abbr("frsq") .valueName ("-c:<circuit>:-i:<filename>:-o:<filename>") - .action( (x, c) => c ++ Seq(passes.memlib.ReplSeqMemAnnotation.parse(x), - RunFirrtlTransformAnnotation(new ReplSeqMem)) ) + .action( (x, c) => Seq(passes.memlib.ReplSeqMemAnnotation.parse(x), + RunFirrtlTransformAnnotation(new ReplSeqMem)) ++ c ) .maxOccurs(1) .text("Replace sequential memories with blackboxes + configuration file") |