1 files changed, 33 insertions, 0 deletions
diff --git a/src/main/scala/firrtl/passes/memlib/MemIR.scala b/src/main/scala/firrtl/passes/memlib/MemIR.scala
new file mode 100644
index 00000000..6dca5961
--- /dev/null
+++ b/src/main/scala/firrtl/passes/memlib/MemIR.scala
@@ -0,0 +1,33 @@
+// See LICENSE for license details.
+
+package firrtl.passes
+package memlib
+
+import firrtl._
+import firrtl.ir._
+import Utils.indent
+
+case class DefAnnotatedMemory(
+    info: Info,
+    name: String,
+    dataType: Type,
+    depth: Int,
+    writeLatency: Int,
+    readLatency: Int,
+    readers: Seq[String],
+    writers: Seq[String],
+    readwriters: Seq[String],
+    readUnderWrite: Option[String],
+    maskGran: Option[BigInt],
+    memRef: Option[String]
+    //pins: Seq[Pin],
+    ) extends Statement with IsDeclaration {
+  def serialize: String = this.toMem.serialize
+  def mapStmt(f: Statement => Statement): Statement = this
+  def mapExpr(f: Expression => Expression): Statement = this
+  def mapType(f: Type => Type): Statement = this.copy(dataType = f(dataType))
+  def mapString(f: String => String): Statement = this.copy(name = f(name))
+  def toMem = DefMemory(info, name, dataType, depth,
+    writeLatency, readLatency, readers, writers,
+    readwriters, readUnderWrite)
+}