diff options
Diffstat (limited to 'src/main/scala/firrtl/passes/Uniquify.scala')
| -rw-r--r-- | src/main/scala/firrtl/passes/Uniquify.scala | 89 |
1 files changed, 51 insertions, 38 deletions
diff --git a/src/main/scala/firrtl/passes/Uniquify.scala b/src/main/scala/firrtl/passes/Uniquify.scala index 978ccc66..1268cac2 100644 --- a/src/main/scala/firrtl/passes/Uniquify.scala +++ b/src/main/scala/firrtl/passes/Uniquify.scala @@ -8,8 +8,9 @@ import firrtl._ import firrtl.ir._ import firrtl.Utils._ import firrtl.Mappers._ -import MemPortUtils.memType +import firrtl.options.Dependency +import MemPortUtils.memType /** Resolve name collisions that would occur in [[LowerTypes]] * @@ -32,6 +33,16 @@ import MemPortUtils.memType * to rename a */ object Uniquify extends Transform { + + override val prerequisites = + Seq( Dependency(ResolveKinds), + Dependency(InferTypes) ) ++ firrtl.stage.Forms.WorkingIR + + override def invalidates(a: Transform): Boolean = a match { + case ResolveKinds | InferTypes => true + case _ => false + } + def inputForm = UnknownForm def outputForm = UnknownForm private case class UniquifyException(msg: String) extends FirrtlInternalException(msg) @@ -41,9 +52,9 @@ object Uniquify extends Transform { // For creation of rename map private case class NameMapNode(name: String, elts: Map[String, NameMapNode]) - // Appends delim to prefix until no collisions of prefix + elts in names - // We don't add an _ in the collision check because elts could be Seq("") - // In this case, we're just really checking if prefix itself collides + /** Appends delim to prefix until no collisions of prefix + elts in names We don't add an _ in the collision check + * because elts could be Seq("") In this case, we're just really checking if prefix itself collides + */ @tailrec def findValidPrefix( prefix: String, @@ -55,10 +66,12 @@ object Uniquify extends Transform { } } - // Enumerates all possible names for a given type - // eg. foo : { bar : { a, b }[2], c } - // => foo, foo bar, foo bar 0, foo bar 1, foo bar 0 a, foo bar 0 b, - // foo bar 1 a, foo bar 1 b, foo c + /** Enumerates all possible names for a given type. For example: + * {{{ + * foo : { bar : { a, b }[2], c } + * => foo, foo bar, foo bar 0, foo bar 1, foo bar 0 a, foo bar 0 b, foo bar 1 a, foo bar 1 b, foo c + * }}} + */ private [firrtl] def enumerateNames(tpe: Type): Seq[Seq[String]] = tpe match { case t: BundleType => t.fields flatMap { f => @@ -72,6 +85,36 @@ object Uniquify extends Transform { case _ => Seq() } + /** Creates a Bundle Type from a Stmt */ + def stmtToType(s: Statement)(implicit sinfo: Info, mname: String): BundleType = { + // Recursive helper + def recStmtToType(s: Statement): Seq[Field] = s match { + case sx: DefWire => Seq(Field(sx.name, Default, sx.tpe)) + case sx: DefRegister => Seq(Field(sx.name, Default, sx.tpe)) + case sx: WDefInstance => Seq(Field(sx.name, Default, sx.tpe)) + case sx: DefMemory => sx.dataType match { + case (_: UIntType | _: SIntType | _: FixedType) => + Seq(Field(sx.name, Default, memType(sx))) + case tpe: BundleType => + val newFields = tpe.fields map ( f => + DefMemory(sx.info, f.name, f.tpe, sx.depth, sx.writeLatency, + sx.readLatency, sx.readers, sx.writers, sx.readwriters) + ) flatMap recStmtToType + Seq(Field(sx.name, Default, BundleType(newFields))) + case tpe: VectorType => + val newFields = (0 until tpe.size) map ( i => + sx.copy(name = i.toString, dataType = tpe.tpe) + ) flatMap recStmtToType + Seq(Field(sx.name, Default, BundleType(newFields))) + } + case sx: DefNode => Seq(Field(sx.name, Default, sx.value.tpe)) + case sx: Conditionally => recStmtToType(sx.conseq) ++ recStmtToType(sx.alt) + case sx: Block => (sx.stmts map recStmtToType).flatten + case sx => Seq() + } + BundleType(recStmtToType(s)) + } + // Accepts a Type and an initial namespace // Returns new Type with uniquified names private def uniquifyNames( @@ -202,36 +245,6 @@ object Uniquify extends Transform { case t => t } - // Creates a Bundle Type from a Stmt - def stmtToType(s: Statement)(implicit sinfo: Info, mname: String): BundleType = { - // Recursive helper - def recStmtToType(s: Statement): Seq[Field] = s match { - case sx: DefWire => Seq(Field(sx.name, Default, sx.tpe)) - case sx: DefRegister => Seq(Field(sx.name, Default, sx.tpe)) - case sx: WDefInstance => Seq(Field(sx.name, Default, sx.tpe)) - case sx: DefMemory => sx.dataType match { - case (_: UIntType | _: SIntType | _: FixedType) => - Seq(Field(sx.name, Default, memType(sx))) - case tpe: BundleType => - val newFields = tpe.fields map ( f => - DefMemory(sx.info, f.name, f.tpe, sx.depth, sx.writeLatency, - sx.readLatency, sx.readers, sx.writers, sx.readwriters) - ) flatMap recStmtToType - Seq(Field(sx.name, Default, BundleType(newFields))) - case tpe: VectorType => - val newFields = (0 until tpe.size) map ( i => - sx.copy(name = i.toString, dataType = tpe.tpe) - ) flatMap recStmtToType - Seq(Field(sx.name, Default, BundleType(newFields))) - } - case sx: DefNode => Seq(Field(sx.name, Default, sx.value.tpe)) - case sx: Conditionally => recStmtToType(sx.conseq) ++ recStmtToType(sx.alt) - case sx: Block => (sx.stmts map recStmtToType).flatten - case sx => Seq() - } - BundleType(recStmtToType(s)) - } - // Everything wrapped in run so that it's thread safe def execute(state: CircuitState): CircuitState = { val c = state.circuit |
