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-rw-r--r--src/main/scala/firrtl/passes/RemoveValidIf.scala13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/main/scala/firrtl/passes/RemoveValidIf.scala b/src/main/scala/firrtl/passes/RemoveValidIf.scala
index 42eae7e5..3b5499ac 100644
--- a/src/main/scala/firrtl/passes/RemoveValidIf.scala
+++ b/src/main/scala/firrtl/passes/RemoveValidIf.scala
@@ -2,9 +2,11 @@
package firrtl
package passes
+
import firrtl.Mappers._
import firrtl.ir._
import Utils.throwInternalError
+import firrtl.options.Dependency
/** Remove [[firrtl.ir.ValidIf ValidIf]] and replace [[firrtl.ir.IsInvalid IsInvalid]] with a connection to zero */
object RemoveValidIf extends Pass {
@@ -27,6 +29,17 @@ object RemoveValidIf extends Pass {
case other => throwInternalError(s"Unexpected type $other")
}
+ override val prerequisites = firrtl.stage.Forms.LowForm
+
+ override val dependents =
+ Seq( Dependency[SystemVerilogEmitter],
+ Dependency[VerilogEmitter] )
+
+ override def invalidates(a: Transform): Boolean = a match {
+ case Legalize | _: firrtl.transforms.ConstantPropagation => true
+ case _ => false
+ }
+
// Recursive. Removes ValidIfs
private def onExp(e: Expression): Expression = {
e map onExp match {