diff options
Diffstat (limited to 'src/main/scala/firrtl/passes/InferWidths.scala')
| -rw-r--r-- | src/main/scala/firrtl/passes/InferWidths.scala | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/main/scala/firrtl/passes/InferWidths.scala b/src/main/scala/firrtl/passes/InferWidths.scala index 1e9657cf..3bee4515 100644 --- a/src/main/scala/firrtl/passes/InferWidths.scala +++ b/src/main/scala/firrtl/passes/InferWidths.scala @@ -60,9 +60,12 @@ case class WidthGeqConstraintAnnotation(loc: ReferenceTarget, exp: ReferenceTarg * * Uses firrtl.constraint package to infer widths */ -class InferWidths extends Transform with ResolvedAnnotationPaths with PreservesAll[Transform] { +class InferWidths extends Transform + with ResolvedAnnotationPaths + with DependencyAPIMigration + with PreservesAll[Transform] { - override val prerequisites = + override def prerequisites = Seq( Dependency(passes.ResolveKinds), Dependency(passes.InferTypes), Dependency(passes.Uniquify), @@ -70,9 +73,6 @@ class InferWidths extends Transform with ResolvedAnnotationPaths with PreservesA Dependency[passes.InferBinaryPoints], Dependency[passes.TrimIntervals] ) ++ firrtl.stage.Forms.WorkingIR - def inputForm: CircuitForm = UnknownForm - def outputForm: CircuitForm = UnknownForm - private val constraintSolver = new ConstraintSolver() val annotationClasses = Seq(classOf[WidthGeqConstraintAnnotation]) |