diff options
Diffstat (limited to 'src/main/scala/firrtl/passes/CommonSubexpressionElimination.scala')
| -rw-r--r-- | src/main/scala/firrtl/passes/CommonSubexpressionElimination.scala | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/main/scala/firrtl/passes/CommonSubexpressionElimination.scala b/src/main/scala/firrtl/passes/CommonSubexpressionElimination.scala index 567cf5f1..544f90a6 100644 --- a/src/main/scala/firrtl/passes/CommonSubexpressionElimination.scala +++ b/src/main/scala/firrtl/passes/CommonSubexpressionElimination.scala @@ -5,9 +5,9 @@ package firrtl.passes import firrtl._ import firrtl.ir._ import firrtl.Mappers._ -import firrtl.options.{Dependency, PreservesAll} +import firrtl.options.Dependency -object CommonSubexpressionElimination extends Pass with PreservesAll[Transform] { +object CommonSubexpressionElimination extends Pass { override def prerequisites = firrtl.stage.Forms.LowForm ++ Seq( Dependency(firrtl.passes.RemoveValidIf), @@ -20,6 +20,8 @@ object CommonSubexpressionElimination extends Pass with PreservesAll[Transform] Seq( Dependency[SystemVerilogEmitter], Dependency[VerilogEmitter] ) + override def invalidates(a: Transform) = false + private def cse(s: Statement): Statement = { val expressions = collection.mutable.HashMap[MemoizedHash[Expression], String]() val nodes = collection.mutable.HashMap[String, Expression]() |