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-rw-r--r--src/main/scala/firrtl/passes/CheckWidths.scala2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/scala/firrtl/passes/CheckWidths.scala b/src/main/scala/firrtl/passes/CheckWidths.scala
index e1e9fc5f..b0d9085b 100644
--- a/src/main/scala/firrtl/passes/CheckWidths.scala
+++ b/src/main/scala/firrtl/passes/CheckWidths.scala
@@ -116,7 +116,7 @@ object CheckWidths extends Pass {
def check_width_p(minfo: Info, target: ModuleTarget)(p: Port): Unit = check_width_t(p.info, target)(p.tpe)
- def check_width_m(circuit: CircuitTarget)(m: DefModule) {
+ def check_width_m(circuit: CircuitTarget)(m: DefModule): Unit = {
m foreach check_width_p(m.info, circuit.module(m.name))
m foreach check_width_s(m.info, circuit.module(m.name))
}