diff options
Diffstat (limited to 'src/main/scala/firrtl/backends/experimental')
| -rw-r--r-- | src/main/scala/firrtl/backends/experimental/rtlil/RtlilEmitter.scala | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/main/scala/firrtl/backends/experimental/rtlil/RtlilEmitter.scala b/src/main/scala/firrtl/backends/experimental/rtlil/RtlilEmitter.scala index a5f7f81f..6c6c0b69 100644 --- a/src/main/scala/firrtl/backends/experimental/rtlil/RtlilEmitter.scala +++ b/src/main/scala/firrtl/backends/experimental/rtlil/RtlilEmitter.scala @@ -880,6 +880,8 @@ private[firrtl] class RtlilEmitter extends SeqTransform with Emitter with Depend println("Leaving memory uninitialized.") case MemoryFileInlineInit(_, _) => throw EmitterException(s"Memory $name cannot be initialized from a file, RTLIL cannot express this.") + case MemoryNoInit => + // No initialization to emit } for (r <- rd) { val data = memPortField(x, r, "data") |