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-rw-r--r--src/main/scala/firrtl/LoweringCompilers.scala2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/main/scala/firrtl/LoweringCompilers.scala b/src/main/scala/firrtl/LoweringCompilers.scala
index 7c239b10..f9a5864c 100644
--- a/src/main/scala/firrtl/LoweringCompilers.scala
+++ b/src/main/scala/firrtl/LoweringCompilers.scala
@@ -189,6 +189,7 @@ class LowFirrtlCompiler extends Compiler {
new ResolveAndCheck(),
new HighFirrtlToMiddleFirrtl(),
new passes.InferReadWrite(TransID(-1)),
+ new passes.ReplSeqMem(TransID(-2)),
new MiddleFirrtlToLowFirrtl(),
new EmitFirrtl(writer)
)
@@ -202,6 +203,7 @@ class VerilogCompiler extends Compiler {
new ResolveAndCheck(),
new HighFirrtlToMiddleFirrtl(),
new passes.InferReadWrite(TransID(-1)),
+ new passes.ReplSeqMem(TransID(-2)),
new MiddleFirrtlToLowFirrtl(),
new passes.InlineInstances(TransID(0)),
new EmitVerilogFromLowFirrtl(writer)