diff options
Diffstat (limited to 'src/main/scala/firrtl/Emitter.scala')
| -rw-r--r-- | src/main/scala/firrtl/Emitter.scala | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/main/scala/firrtl/Emitter.scala b/src/main/scala/firrtl/Emitter.scala index 1ba218f0..459404c3 100644 --- a/src/main/scala/firrtl/Emitter.scala +++ b/src/main/scala/firrtl/Emitter.scala @@ -180,9 +180,9 @@ class VerilogEmitter extends SeqTransform with Emitter { def inputForm = LowForm def outputForm = LowForm - override val prerequisites = firrtl.stage.Forms.LowFormOptimized + override def prerequisites = firrtl.stage.Forms.LowFormOptimized - override val dependents = Seq.empty + override def dependents = Seq.empty val outputSuffix = ".v" val tab = " " @@ -1108,7 +1108,7 @@ class VerilogEmitter extends SeqTransform with Emitter { class MinimumVerilogEmitter extends VerilogEmitter with Emitter { - override val prerequisites = firrtl.stage.Forms.LowFormMinimumOptimized + override def prerequisites = firrtl.stage.Forms.LowFormMinimumOptimized override def transforms = new TransformManager(firrtl.stage.Forms.VerilogMinimumOptimized, prerequisites) .flattenedTransformOrder |