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Diffstat (limited to 'src/main/scala/firrtl/Compiler.scala')
| -rw-r--r-- | src/main/scala/firrtl/Compiler.scala | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/main/scala/firrtl/Compiler.scala b/src/main/scala/firrtl/Compiler.scala index 78ea644d..5c6b76ae 100644 --- a/src/main/scala/firrtl/Compiler.scala +++ b/src/main/scala/firrtl/Compiler.scala @@ -27,15 +27,19 @@ object VerilogCompiler extends Compiler { CInferMDir, RemoveCHIRRTL, ToWorkingIR, + CheckHighForm, ResolveKinds, InferTypes, + CheckTypes, ResolveGenders, + CheckGenders, InferWidths, + CheckWidths, PullMuxes, ExpandConnects, RemoveAccesses, ExpandWhens, - //CheckInitialization, + CheckInitialization, ConstProp, ResolveKinds, InferTypes, |