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-rw-r--r--fuzzer/src/main/scala/firrtl/ExprGenParams.scala2
1 files changed, 1 insertions, 1 deletions
diff --git a/fuzzer/src/main/scala/firrtl/ExprGenParams.scala b/fuzzer/src/main/scala/firrtl/ExprGenParams.scala
index 909f3a16..ddaec00d 100644
--- a/fuzzer/src/main/scala/firrtl/ExprGenParams.scala
+++ b/fuzzer/src/main/scala/firrtl/ExprGenParams.scala
@@ -70,7 +70,7 @@ sealed trait ExprGenParams {
case SIntType(IntWidth(width)) if width == BigInt(1) => ExprGen.ReferenceGen.boolSIntGen[ExprGenParams, G].get
case SIntType(IntWidth(width)) => ExprGen.ReferenceGen.sintGen[ExprGenParams, G].get(width)
}
- unboundRefs <- StateGen.inspect { ExprState[ExprGenParams].unboundRefs(_) }
+ unboundRefs <- StateGen.inspect { ExprState[ExprGenParams].unboundRefs }
} yield {
val outputPort = Port(
NoInfo,