diff options
| author | azidar | 2015-04-08 19:23:04 -0700 |
|---|---|---|
| committer | azidar | 2015-04-08 19:23:04 -0700 |
| commit | 16b9cb55c7d3e546af7eee3528079c9ac9bb530b (patch) | |
| tree | bc339e111111a7ffc0badeac4b985ae0b6ae8b55 /test/passes/resolve-genders/subbundle.fir | |
| parent | 227ef1c31c61ca861bfa0f19679fca4472b3aa9a (diff) | |
Added test to show correctness of gender inference and lowering
Diffstat (limited to 'test/passes/resolve-genders/subbundle.fir')
| -rw-r--r-- | test/passes/resolve-genders/subbundle.fir | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/test/passes/resolve-genders/subbundle.fir b/test/passes/resolve-genders/subbundle.fir new file mode 100644 index 00000000..247251ae --- /dev/null +++ b/test/passes/resolve-genders/subbundle.fir @@ -0,0 +1,11 @@ +; RUN: firrtl %s abcdefghipj c | tee %s.out | FileCheck %s + +;CHECK: Lower To Ground +circuit top : + module M : + wire w : { flip x : UInt(10)} + reg r : { flip x : UInt(10)} + w := r ; CHECK r$x := w$x + w.x := r.x ; CHECK w$x := r$x +; CHECK: Finished Lower To Ground + |