diff options
| author | azidar | 2015-07-07 10:13:29 -0700 |
|---|---|---|
| committer | azidar | 2015-07-14 11:29:55 -0700 |
| commit | d696dd01de8a1a83a376c719490f475be991f387 (patch) | |
| tree | ca5d8f21c0f7787cc6eb00e078f0c0ae1e20a182 /test/passes/lower-to-ground | |
| parent | 3c8f283b445ca99d4ed4c1e04e2bc8bdcdbd72f6 (diff) | |
Pass most tests. The ones that do not pass are not expected to, yet
Diffstat (limited to 'test/passes/lower-to-ground')
| -rw-r--r-- | test/passes/lower-to-ground/accessor.fir | 8 | ||||
| -rw-r--r-- | test/passes/lower-to-ground/bundle-vecs.fir | 4 | ||||
| -rw-r--r-- | test/passes/lower-to-ground/nested-vec.fir | 4 | ||||
| -rw-r--r-- | test/passes/lower-to-ground/test.fir | 3 |
4 files changed, 11 insertions, 8 deletions
diff --git a/test/passes/lower-to-ground/accessor.fir b/test/passes/lower-to-ground/accessor.fir index 8fe1bc52..cede6f43 100644 --- a/test/passes/lower-to-ground/accessor.fir +++ b/test/passes/lower-to-ground/accessor.fir @@ -12,21 +12,21 @@ circuit top : ; CHECK: wire a$2 : UInt<32> ; CHECK: wire a$3 : UInt<32> - accessor b = a[i] + infer accessor b = a[i] ; CHECK: wire b : UInt<32> ; CHECK: b := (a$0 a$1 a$2 a$3)[i] j := b - accessor c = a[i] + infer accessor c = a[i] ; CHECK: wire c : UInt<32> ; CHECK: (a$0 a$1 a$2 a$3)[i] := c c := j cmem p : UInt<32>[4] - accessor t = p[i] + infer accessor t = p[i] ; CHECK: accessor t = p[i] j := t - accessor r = p[i] + infer accessor r = p[i] ; CHECK: accessor r = p[i] r := j diff --git a/test/passes/lower-to-ground/bundle-vecs.fir b/test/passes/lower-to-ground/bundle-vecs.fir index 0b9d9799..e71e9104 100644 --- a/test/passes/lower-to-ground/bundle-vecs.fir +++ b/test/passes/lower-to-ground/bundle-vecs.fir @@ -12,14 +12,14 @@ circuit top : ; CHECK: wire a$1$x : UInt<32> ; CHECK: wire a$1$y : UInt<32> - accessor b = a[i] + infer accessor b = a[i] ; CHECK: wire b$x : UInt<32> ; CHECK: wire b$y : UInt<32> ; CHECK: b$x := (a$0$x a$1$x)[i] ; CHECK: (a$0$y a$1$y)[i] := b$y j := b - accessor c = a[i] + infer accessor c = a[i] ; CHECK: wire c$x : UInt<32> ; CHECK: wire c$y : UInt<32> ; CHECK: (a$0$x a$1$x)[i] := c$x diff --git a/test/passes/lower-to-ground/nested-vec.fir b/test/passes/lower-to-ground/nested-vec.fir index c39850f4..a2eb1215 100644 --- a/test/passes/lower-to-ground/nested-vec.fir +++ b/test/passes/lower-to-ground/nested-vec.fir @@ -13,7 +13,7 @@ circuit top : ; CHECK: wire a$1$x : UInt<32> ; CHECK: wire a$1$y : UInt<32> - accessor b = a[i] + infer accessor b = a[i] ; CHECK: wire b$x : UInt<32> ; CHECK: wire b$y : UInt<32> ; CHECK: b$x := (a$0$x a$1$x)[i] @@ -24,7 +24,7 @@ circuit top : ; CHECK: cmem m$x : UInt<32>[2] ; CHECK: cmem m$y : UInt<32>[2] - accessor c = m[i] ; MALE + infer accessor c = m[i] ; MALE ; CHECK: accessor c$x = m$x[i] ; CHECK: accessor c$y = m$y[i] diff --git a/test/passes/lower-to-ground/test.fir b/test/passes/lower-to-ground/test.fir index 7fcf0013..7e123fc3 100644 --- a/test/passes/lower-to-ground/test.fir +++ b/test/passes/lower-to-ground/test.fir @@ -4,10 +4,13 @@ circuit Top : module Queue : output out : {valid : UInt<1>, flip ready : UInt<1>} + out.valid := UInt(1) module Top : output this : {out : {valid : UInt<1>, flip ready : UInt<1>}} inst queue of Queue this.out := queue.out wire w : { x : UInt<5>, flip y : UInt<5>} + w.x := UInt(1) wire a : UInt<5> + a := UInt(1) w.y := a |