diff options
| author | azidar | 2015-08-24 11:45:37 -0700 |
|---|---|---|
| committer | azidar | 2015-08-24 11:45:37 -0700 |
| commit | 5d3061bfed8445370e6fa97ec9238ba49e8fafbc (patch) | |
| tree | ba0373c05118215fa332c9e7cd10233a69800f53 /test/passes/lower-to-ground | |
| parent | 50cf7a4823d69967dcb2b10cdef892b0ab5f2184 (diff) | |
Changed all tests to use verilog backend.
Diffstat (limited to 'test/passes/lower-to-ground')
| -rw-r--r-- | test/passes/lower-to-ground/accessor.fir | 2 | ||||
| -rw-r--r-- | test/passes/lower-to-ground/bundle-vecs.fir | 2 | ||||
| -rw-r--r-- | test/passes/lower-to-ground/bundle.fir | 2 | ||||
| -rw-r--r-- | test/passes/lower-to-ground/instance.fir | 2 | ||||
| -rw-r--r-- | test/passes/lower-to-ground/nested-vec.fir | 2 | ||||
| -rw-r--r-- | test/passes/lower-to-ground/register.fir | 2 | ||||
| -rw-r--r-- | test/passes/lower-to-ground/test.fir | 2 |
7 files changed, 7 insertions, 7 deletions
diff --git a/test/passes/lower-to-ground/accessor.fir b/test/passes/lower-to-ground/accessor.fir index c2fbe17e..fd261e1e 100644 --- a/test/passes/lower-to-ground/accessor.fir +++ b/test/passes/lower-to-ground/accessor.fir @@ -1,4 +1,4 @@ -; RUN: firrtl -i %s -o %s.flo -X flo -p cd 2>&1 | tee %s.out | FileCheck %s +; RUN: firrtl -i %s -o %s.v -X verilog -p cd 2>&1 | tee %s.out | FileCheck %s ; CHECK: Lower To Ground circuit top : diff --git a/test/passes/lower-to-ground/bundle-vecs.fir b/test/passes/lower-to-ground/bundle-vecs.fir index 1700c4d3..17927aef 100644 --- a/test/passes/lower-to-ground/bundle-vecs.fir +++ b/test/passes/lower-to-ground/bundle-vecs.fir @@ -1,4 +1,4 @@ -; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s +; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s ; CHECK: Lower To Ground circuit top : diff --git a/test/passes/lower-to-ground/bundle.fir b/test/passes/lower-to-ground/bundle.fir index 19cf7f85..06558e44 100644 --- a/test/passes/lower-to-ground/bundle.fir +++ b/test/passes/lower-to-ground/bundle.fir @@ -1,4 +1,4 @@ -; RUN: firrtl -i %s -o %s.flo -X flo -p cd 2>&1 | tee %s.out | FileCheck %s +; RUN: firrtl -i %s -o %s.v -X verilog -p cd 2>&1 | tee %s.out | FileCheck %s circuit top : module m : diff --git a/test/passes/lower-to-ground/instance.fir b/test/passes/lower-to-ground/instance.fir index c384749f..8d6beb93 100644 --- a/test/passes/lower-to-ground/instance.fir +++ b/test/passes/lower-to-ground/instance.fir @@ -1,4 +1,4 @@ -; RUN: firrtl -i %s -o %s.flo -X flo -p cdg 2>&1 | tee %s.out | FileCheck %s +; RUN: firrtl -i %s -o %s.v -X verilog -p cdg 2>&1 | tee %s.out | FileCheck %s circuit top : module source : diff --git a/test/passes/lower-to-ground/nested-vec.fir b/test/passes/lower-to-ground/nested-vec.fir index ad5fc4c0..d484a6dc 100644 --- a/test/passes/lower-to-ground/nested-vec.fir +++ b/test/passes/lower-to-ground/nested-vec.fir @@ -1,4 +1,4 @@ -; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s +; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s ; CHECK: Lower To Ground circuit top : diff --git a/test/passes/lower-to-ground/register.fir b/test/passes/lower-to-ground/register.fir index b896cff4..75b4fe88 100644 --- a/test/passes/lower-to-ground/register.fir +++ b/test/passes/lower-to-ground/register.fir @@ -1,4 +1,4 @@ -; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s +; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s ; CHECK: Lower To Ground circuit top : diff --git a/test/passes/lower-to-ground/test.fir b/test/passes/lower-to-ground/test.fir index a048089b..db78da84 100644 --- a/test/passes/lower-to-ground/test.fir +++ b/test/passes/lower-to-ground/test.fir @@ -1,4 +1,4 @@ -; RUN: firrtl -i %s -o %s.flo -X flo -p cdt 2>&1 | tee %s.out | FileCheck %s +; RUN: firrtl -i %s -o %s.v -X verilog -p cdt 2>&1 | tee %s.out | FileCheck %s ; CHECK: Done! circuit Top : |