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| author | azidar | 2015-05-18 16:04:58 -0700 |
|---|---|---|
| committer | azidar | 2015-05-18 16:04:58 -0700 |
| commit | 3336e6beb23e1ba883097eac0c0000269bf8ebfa (patch) | |
| tree | c97d9ba8d0e50476e2d32a150fe401cc7413cff8 /test/passes/lower-to-ground/nested-vec.fir | |
| parent | 2702e571040e7a07317b79f9c5cfdbd61b9ab2bf (diff) | |
Big API Change. Pad is no longer supported. Widths of primops can be flexible, and the output is usually the max of the inputs. Removed all u/s variants, which need to be dealt with in backends where it matters
Diffstat (limited to 'test/passes/lower-to-ground/nested-vec.fir')
| -rw-r--r-- | test/passes/lower-to-ground/nested-vec.fir | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/passes/lower-to-ground/nested-vec.fir b/test/passes/lower-to-ground/nested-vec.fir index 95b125f6..b7915c5d 100644 --- a/test/passes/lower-to-ground/nested-vec.fir +++ b/test/passes/lower-to-ground/nested-vec.fir @@ -1,8 +1,8 @@ -; RUN: firrtl -i %s -o %s.flo -x abcdefgh -p c | tee %s.out | FileCheck %s +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s ; CHECK: Lower To Ground circuit top : - module q : + module top : wire i : UInt wire j : { x : UInt<32>, flip y : UInt<32> } wire k : { x : UInt<32>, y : UInt<32> } |