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authorazidar2016-01-26 14:18:34 -0800
committerazidar2016-01-28 09:25:04 -0800
commit5ab30c681558d2a26000696e518ee5b28deb1303 (patch)
treedcdfaeb3bcb42561e010928712218c8cd3a1b2c7 /test/passes/jacktest/ALUTop.fir
parent8c288f7b159b3f4ca1cb0d5c5012eb8fb52d5214 (diff)
Updated all tests to pass
Diffstat (limited to 'test/passes/jacktest/ALUTop.fir')
-rw-r--r--test/passes/jacktest/ALUTop.fir10
1 files changed, 5 insertions, 5 deletions
diff --git a/test/passes/jacktest/ALUTop.fir b/test/passes/jacktest/ALUTop.fir
index 74abe0bd..a0aadb11 100644
--- a/test/passes/jacktest/ALUTop.fir
+++ b/test/passes/jacktest/ALUTop.fir
@@ -9,8 +9,8 @@ circuit ALUTop :
input alu_op : UInt<4>
node shamt = bits(B, 4, 0)
- node T_157 = addw(A, B)
- node T_158 = subw(A, B)
+ node T_157 = tail(add(A, B),1)
+ node T_158 = tail(sub(A, B),1)
node T_159 = cvt(A)
node T_160 = dshr(T_159, shamt)
node T_161 = asUInt(T_160)
@@ -50,10 +50,10 @@ circuit ALUTop :
node oot = mux(T_194, T_157, T_193)
node T_195 = bits(oot, 31, 0)
out <= T_195
- node T_196 = bit(alu_op, 0)
- node T_197 = subw(UInt<1>(0), B)
+ node T_196 = bits(alu_op, 0, 0)
+ node T_197 = tail(sub(UInt<1>(0), B),1)
node T_198 = mux(T_196, T_197, B)
- node T_199 = addw(A, T_198)
+ node T_199 = tail(add(A, T_198),1)
sum <= T_199
module ALUdec :
input opcode : UInt<7>