diff options
| author | azidar | 2015-09-30 09:29:38 -0700 |
|---|---|---|
| committer | azidar | 2015-09-30 09:29:38 -0700 |
| commit | 56852471179bee7549a2197735fa009fbb3036e7 (patch) | |
| tree | 7681c4eba2dfc4b67b625d75fb7106f5a6115f50 /test/passes/inline-indexers/simple7.fir | |
| parent | 4fefd791eed5ede508a7d47a3f21bf7790d05514 (diff) | |
Moved To-Real-Ir earlier, so CheckWidth could happen before PadWidth
Diffstat (limited to 'test/passes/inline-indexers/simple7.fir')
| -rw-r--r-- | test/passes/inline-indexers/simple7.fir | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/test/passes/inline-indexers/simple7.fir b/test/passes/inline-indexers/simple7.fir new file mode 100644 index 00000000..cc9c6231 --- /dev/null +++ b/test/passes/inline-indexers/simple7.fir @@ -0,0 +1,13 @@ +; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s + +;CHECK: Inline Indexers +circuit top : + module top : + output out : UInt<64> + input index : UInt<1> + wire T_292 : UInt<64>[2] + T_292[0] := UInt(1) + T_292[1] := UInt(1) + infer accessor T_297 = T_292[index] + out := T_297 +;CHECK: Done! |