diff options
| author | azidar | 2016-01-16 15:24:04 -0800 |
|---|---|---|
| committer | azidar | 2016-01-16 15:24:04 -0800 |
| commit | c4271d9e428bba7b447ed6d18fb11729d2b61b22 (patch) | |
| tree | 4aa99efec08a0161ee960721087c30f577206aa4 /test/passes/inline-indexers/simple4.fir | |
| parent | f087941e66296d295f2f7b5e9a5dd08746238b2f (diff) | |
Fixed all tests so they either pass are marked as expected failures
Diffstat (limited to 'test/passes/inline-indexers/simple4.fir')
| -rw-r--r-- | test/passes/inline-indexers/simple4.fir | 25 |
1 files changed, 0 insertions, 25 deletions
diff --git a/test/passes/inline-indexers/simple4.fir b/test/passes/inline-indexers/simple4.fir deleted file mode 100644 index 0f16b669..00000000 --- a/test/passes/inline-indexers/simple4.fir +++ /dev/null @@ -1,25 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s - -;CHECK: Inline Indexers -circuit top : - module top : - input in : {x : UInt<32>, y : UInt<32>} - input i : UInt<1> - wire m : {x : UInt<32>, y : UInt<32>}[2] - m[0].x <= UInt("h1") - m[0].y <= UInt("h1") - m[1].x <= UInt("h1") - m[1].y <= UInt("h1") - infer accessor a = m[i] - a.x <= in.x - -;CHECK: wire a$x_2 : UInt<32> -;CHECK: node i_1 = i -;CHECK: when eqv(i_1, UInt("h0")) : m$0$x <= a$x_2 -;CHECK: when eqv(i_1, UInt("h1")) : m$1$x <= a$x_2 -;CHECK: a$x_2 <= in$x -;CHECK: Finished Inline Indexers -;CHECK: Done! - - - |