diff options
| author | azidar | 2016-01-16 15:24:04 -0800 |
|---|---|---|
| committer | azidar | 2016-01-16 15:24:04 -0800 |
| commit | c4271d9e428bba7b447ed6d18fb11729d2b61b22 (patch) | |
| tree | 4aa99efec08a0161ee960721087c30f577206aa4 /test/passes/inline-indexers/simple3.fir | |
| parent | f087941e66296d295f2f7b5e9a5dd08746238b2f (diff) | |
Fixed all tests so they either pass are marked as expected failures
Diffstat (limited to 'test/passes/inline-indexers/simple3.fir')
| -rw-r--r-- | test/passes/inline-indexers/simple3.fir | 20 |
1 files changed, 0 insertions, 20 deletions
diff --git a/test/passes/inline-indexers/simple3.fir b/test/passes/inline-indexers/simple3.fir deleted file mode 100644 index 1ef4c192..00000000 --- a/test/passes/inline-indexers/simple3.fir +++ /dev/null @@ -1,20 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s - -;CHECK: Inline Indexers -circuit top : - module top : - input in : UInt<32> - input i : UInt<1> - wire m : UInt<32>[2] - m[0] <= UInt("h1") - m[1] <= UInt("h1") - infer accessor a = m[i] - a <= in - -;CHECK: wire a_2 : UInt<32> -;CHECK: when eqv(i_1, UInt("h0")) : m$0 <= a_2 -;CHECK: when eqv(i_1, UInt("h1")) : m$1 <= a_2 - - - -;CHECK: Done! |