diff options
| author | azidar | 2015-05-18 16:04:58 -0700 |
|---|---|---|
| committer | azidar | 2015-05-18 16:04:58 -0700 |
| commit | 3336e6beb23e1ba883097eac0c0000269bf8ebfa (patch) | |
| tree | c97d9ba8d0e50476e2d32a150fe401cc7413cff8 /test/passes/infer-widths | |
| parent | 2702e571040e7a07317b79f9c5cfdbd61b9ab2bf (diff) | |
Big API Change. Pad is no longer supported. Widths of primops can be flexible, and the output is usually the max of the inputs. Removed all u/s variants, which need to be dealt with in backends where it matters
Diffstat (limited to 'test/passes/infer-widths')
| -rw-r--r-- | test/passes/infer-widths/dsh.fir | 8 | ||||
| -rw-r--r-- | test/passes/infer-widths/gcd.fir | 6 | ||||
| -rw-r--r-- | test/passes/infer-widths/simple.fir | 2 |
3 files changed, 8 insertions, 8 deletions
diff --git a/test/passes/infer-widths/dsh.fir b/test/passes/infer-widths/dsh.fir index 871e7e8b..6b683e56 100644 --- a/test/passes/infer-widths/dsh.fir +++ b/test/passes/infer-widths/dsh.fir @@ -12,10 +12,10 @@ circuit top : wire c : UInt wire d : SInt - a := dshl-u(x,y) - b := dshl-s(z,y) - c := dshr-u(x,y) - d := dshr-s(z,y) + a := dshl(x,y) + b := dshl(z,y) + c := dshr(x,y) + d := dshr(z,y) ; CHECK: wire a : UInt<23> diff --git a/test/passes/infer-widths/gcd.fir b/test/passes/infer-widths/gcd.fir index 4d4c3575..9e4bf0f5 100644 --- a/test/passes/infer-widths/gcd.fir +++ b/test/passes/infer-widths/gcd.fir @@ -6,7 +6,7 @@ circuit top : input x : UInt input y : UInt output q : UInt - q := sub-wrap-uu(x, y) + q := sub-wrap(x, y) module gcd : input a : UInt<16> input b : UInt<16> @@ -17,7 +17,7 @@ circuit top : reg y : UInt on-reset x := UInt(0) on-reset y := UInt(42) - when gt-uu(x, y) : + when gt(x, y) : inst s of subtracter s.x := x s.y := y @@ -30,7 +30,7 @@ circuit top : when e : x := a y := b - v := eq-uu(v, UInt(0)) + v := eq(v, UInt(0)) z := x module top : input a : UInt<16> diff --git a/test/passes/infer-widths/simple.fir b/test/passes/infer-widths/simple.fir index 6f3b51c9..590515e7 100644 --- a/test/passes/infer-widths/simple.fir +++ b/test/passes/infer-widths/simple.fir @@ -12,7 +12,7 @@ circuit top : wire c : UInt wire z : UInt - z := mux(c,Pad(a,?),Pad(b,?)) + z := mux(c,a,b) |
