diff options
| author | azidar | 2015-07-07 10:13:29 -0700 |
|---|---|---|
| committer | azidar | 2015-07-07 10:13:29 -0700 |
| commit | df4bae5c7a95d3a56f95d86212f083b7ba121da7 (patch) | |
| tree | af46f090557734528d9d29fcf499d73024c575ac /test/passes/infer-widths/simple.fir | |
| parent | c8d1fc06443e81374b1af95e17e3ecbecf863700 (diff) | |
Pass most tests. The ones that do not pass are not expected to, yet
Diffstat (limited to 'test/passes/infer-widths/simple.fir')
| -rw-r--r-- | test/passes/infer-widths/simple.fir | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/test/passes/infer-widths/simple.fir b/test/passes/infer-widths/simple.fir index 590515e7..6a50ae77 100644 --- a/test/passes/infer-widths/simple.fir +++ b/test/passes/infer-widths/simple.fir @@ -4,12 +4,16 @@ circuit top : module top : wire e : UInt<30> + e := UInt(1) reg y : UInt y := e wire a : UInt<20> + a := UInt(1) wire b : UInt<10> + b := UInt(1) wire c : UInt + c := UInt(1) wire z : UInt z := mux(c,a,b) |