diff options
| author | azidar | 2015-07-13 16:22:43 -0700 |
|---|---|---|
| committer | azidar | 2015-07-14 11:29:55 -0700 |
| commit | 271e1bf5ed56847c1ce7d50bdb7f1db9ccc5ea55 (patch) | |
| tree | 8b1cdfcfc97a9710bd1bc5be973578f712cfa253 /test/passes/expand-whens/partial-init.fir | |
| parent | 0bfb3618b654a4082cc2780887b3ca32e374f455 (diff) | |
Added tests for clocks. Added remove scope and special chars passes. Added tests. Made more tests pass
Diffstat (limited to 'test/passes/expand-whens/partial-init.fir')
| -rw-r--r-- | test/passes/expand-whens/partial-init.fir | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/test/passes/expand-whens/partial-init.fir b/test/passes/expand-whens/partial-init.fir index 03b1f965..f752eccd 100644 --- a/test/passes/expand-whens/partial-init.fir +++ b/test/passes/expand-whens/partial-init.fir @@ -3,7 +3,9 @@ ; CHECK: Expand Whens circuit top : module top : - reg r : UInt<1>[10] + input clk : Clock + input reset : UInt<1> + reg r : UInt<1>[10],clk,reset r[0] := UInt(1) r[1] := UInt(1) r[2] := UInt(1) @@ -14,6 +16,6 @@ circuit top : r[7] := UInt(1) r[8] := UInt(1) r[9] := UInt(1) - on-reset r[3] := UInt(0) + onreset r[3] := UInt(0) ; CHECK: Finished Expand Whens |