New memory works with verilog. Slowly changing tests and fixing bugs.

Decided to not have Conditionally in low firrtl - instead, Print and
Stop have enables

4 files changed, 37 insertions, 37 deletions

diff --git a/test/passes/expand-accessors/accessor-mem.fir b/test/passes/expand-accessors/accessor-mem.fir
index 6f8b63e3..6f64f57d 100644
--- a/test/passes/expand-accessors/accessor-mem.fir
+++ b/test/passes/expand-accessors/accessor-mem.fir
@@ -6,19 +6,19 @@ circuit top :
       input clk : Clock
       cmem m : UInt<32>[2][2][2], clk
       wire i : UInt<4>
-      i := UInt(1)
+      i <= UInt(1)
       infer accessor a = m[i] ;CHECK: read accessor a = m[i]
       infer accessor b = a[i] ;CHECK: indexer b = (a[0] a[1])[i] : UInt<32>[2]
       infer accessor c = b[i] ;CHECK: indexer c = (b[0] b[1])[i] : UInt<32>
       wire j : UInt<32>
-      j := c
+      j <= c
 
       infer accessor x = m[i] ;CHECK: write accessor x = m[i]
       infer accessor y = x[i] ;CHECK: indexer (x[0] x[1])[i] = y : UInt<32>[2]
-      y[0] := UInt(1)
-      y[1] := UInt(1)
+      y[0] <= UInt(1)
+      y[1] <= UInt(1)
       infer accessor z = y[i] ;CHECK: indexer (y[0] y[1])[i] = z : UInt<32>
-      z := j
+      z <= j
 
 ; CHECK: Finished Expand Accessors
 ; CHECK: Done!
diff --git a/test/passes/expand-accessors/accessor-vec.fir b/test/passes/expand-accessors/accessor-vec.fir
index 96a5c74c..1d1bbec9 100644
--- a/test/passes/expand-accessors/accessor-vec.fir
+++ b/test/passes/expand-accessors/accessor-vec.fir
@@ -4,44 +4,44 @@
 circuit top :
    module top :
       wire m : UInt<32>[2][2][2]
-      m[0][0][0] := UInt(1)
-      m[1][0][0] := UInt(1)
-      m[0][1][0] := UInt(1)
-      m[1][1][0] := UInt(1)
-      m[0][0][1] := UInt(1)
-      m[1][0][1] := UInt(1)
-      m[0][1][1] := UInt(1)
-      m[1][1][1] := UInt(1)
+      m[0][0][0] <= UInt(1)
+      m[1][0][0] <= UInt(1)
+      m[0][1][0] <= UInt(1)
+      m[1][1][0] <= UInt(1)
+      m[0][0][1] <= UInt(1)
+      m[1][0][1] <= UInt(1)
+      m[0][1][1] <= UInt(1)
+      m[1][1][1] <= UInt(1)
       wire i : UInt
-      i := UInt(1)
+      i <= UInt(1)
       infer accessor a = m[i] ;CHECK: indexer a = (m[0] m[1])[i] : UInt<32>[2][2]
       infer accessor b = a[i] ;CHECK: indexer b = (a[0] a[1])[i] : UInt<32>[2]
       infer accessor c = b[i] ;CHECK: indexer c = (b[0] b[1])[i] : UInt<32>
       wire j : UInt
-      j := c
+      j <= c
 
       infer accessor x = m[i] ;CHECK: indexer (m[0] m[1])[i] = x : UInt<32>[2][2]
-      x[0][0] := UInt(1)
-      x[1][0] := UInt(1)
-      x[0][1] := UInt(1)
-      x[1][1] := UInt(1)
+      x[0][0] <= UInt(1)
+      x[1][0] <= UInt(1)
+      x[0][1] <= UInt(1)
+      x[1][1] <= UInt(1)
       infer accessor y = x[i] ;CHECK: indexer (x[0] x[1])[i] = y : UInt<32>[2]
       infer accessor z = y[i] ;CHECK: indexer (y[0] y[1])[i] = z : UInt<32>
-      y[0] := UInt(1)
-      y[1] := UInt(1)
-      z := j
+      y[0] <= UInt(1)
+      y[1] <= UInt(1)
+      z <= j
 
       wire p : {n : UInt<32>[2]}
-      p.n[0] := UInt(1)
-      p.n[1] := UInt(1)
+      p.n[0] <= UInt(1)
+      p.n[1] <= UInt(1)
       infer accessor q = p.n[i] ;CHECK: indexer (p.n[0] p.n[1])[i] = q : UInt<32>
-      q := j
+      q <= j
 
       wire r : {m : UInt<32>}[2]
-      r[0].m := UInt(1)
-      r[1].m := UInt(1)
+      r[0].m <= UInt(1)
+      r[1].m <= UInt(1)
       infer accessor s = r[i] ;CHECK: indexer s = (r[0] r[1])[i] : { m : UInt<32>}
-      j := s.m
+      j <= s.m
 
 ; CHECK: Finished Expand Accessors
 ; CHECK: Done!
diff --git a/test/passes/expand-accessors/simple.fir b/test/passes/expand-accessors/simple.fir
index 7f5a4eb8..7e8a4dcd 100644
--- a/test/passes/expand-accessors/simple.fir
+++ b/test/passes/expand-accessors/simple.fir
@@ -6,10 +6,10 @@ circuit top :
       output o : UInt
       wire m : UInt<32>[2]
       wire i : UInt
-      m[0] := UInt("h1")
-      m[1] := UInt("h1")
-      i := UInt("h1")
+      m[0] <= UInt("h1")
+      m[1] <= UInt("h1")
+      i <= UInt("h1")
       infer accessor a = m[i] ;CHECK: indexer a = (m$0 m$1)[i] : UInt<32>
-      o := a
+      o <= a
 
 
diff --git a/test/passes/expand-accessors/simple2.fir b/test/passes/expand-accessors/simple2.fir
index 54f8a507..550d34b8 100644
--- a/test/passes/expand-accessors/simple2.fir
+++ b/test/passes/expand-accessors/simple2.fir
@@ -7,11 +7,11 @@ circuit top :
       output o2 : UInt
       wire m : UInt<32>[2]
       wire i : UInt
-      m[0] := UInt("h1")
-      m[1] := UInt("h1")
-      i := UInt("h1")
+      m[0] <= UInt("h1")
+      m[1] <= UInt("h1")
+      i <= UInt("h1")
       infer accessor a = m[i] ;CHECK: indexer a = (m$0 m$1)[i] : UInt<32>
-      o1 := a
-      o2 := a
+      o1 <= a
+      o2 <= a