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| author | azidar | 2015-08-20 15:35:43 -0700 |
|---|---|---|
| committer | azidar | 2015-08-20 15:35:43 -0700 |
| commit | 5694a8808bd724b820caca2f5f1176b8c1e3f40d (patch) | |
| tree | 92817e13e0639c9a4c4b9341c147242e7d3d2040 /test/features/InitAccessor.fir | |
| parent | 169164c3ad828ccae89c43d4bdbb531f3a2e6237 (diff) | |
Added tests, cleaned up repo
Diffstat (limited to 'test/features/InitAccessor.fir')
| -rw-r--r-- | test/features/InitAccessor.fir | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/test/features/InitAccessor.fir b/test/features/InitAccessor.fir new file mode 100644 index 00000000..983cbd94 --- /dev/null +++ b/test/features/InitAccessor.fir @@ -0,0 +1,10 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s +;CHECK: Done! +circuit Top : + module Top : + input in : UInt<1> + wire b : UInt<1>[3] + node c = UInt(1) + infer accessor a = b[c] + when in : + a := UInt(1) |