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authorazidar2015-07-30 16:00:40 -0700
committerazidar2015-07-30 16:00:40 -0700
commit4264d0c18948905ef0d924002ca828b19a69e69b (patch)
treef9a338aecda2d0717c1acced66b5aa0816171694 /test/errors/high-form/Flip-Mem.fir
parenta2f3ac70d45b6a419178e2d28a2b7be801599d13 (diff)
Updated error and feature tests. Fixed bug in detecting incorrect genders
Diffstat (limited to 'test/errors/high-form/Flip-Mem.fir')
-rw-r--r--test/errors/high-form/Flip-Mem.fir8
1 files changed, 4 insertions, 4 deletions
diff --git a/test/errors/high-form/Flip-Mem.fir b/test/errors/high-form/Flip-Mem.fir
index 62eba530..c1a3702a 100644
--- a/test/errors/high-form/Flip-Mem.fir
+++ b/test/errors/high-form/Flip-Mem.fir
@@ -1,9 +1,9 @@
; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
-; CHECK: Memory m-c cannot be a bundle type with flips.
-; CHECK: Memory m-s cannot be a bundle type with flips.
+; CHECK: Memory mc cannot be a bundle type with flips.
+; CHECK: Memory ms cannot be a bundle type with flips.
circuit Flip-Mem :
module Flip-Mem :
input clk : Clock
- cmem m-c : {x : UInt<3>, flip y : UInt<5>}[10], clk
- smem m-s : {x : UInt<3>, flip y : UInt<5>}[10], clk
+ cmem mc : {x : UInt<3>, flip y : UInt<5>}[10], clk
+ smem ms : {x : UInt<3>, flip y : UInt<5>}[10], clk