diff options
| author | azidar | 2015-07-07 10:13:29 -0700 |
|---|---|---|
| committer | azidar | 2015-07-07 10:13:29 -0700 |
| commit | df4bae5c7a95d3a56f95d86212f083b7ba121da7 (patch) | |
| tree | af46f090557734528d9d29fcf499d73024c575ac /test/chisel3/Tbl.fir | |
| parent | c8d1fc06443e81374b1af95e17e3ecbecf863700 (diff) | |
Pass most tests. The ones that do not pass are not expected to, yet
Diffstat (limited to 'test/chisel3/Tbl.fir')
| -rw-r--r-- | test/chisel3/Tbl.fir | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/chisel3/Tbl.fir b/test/chisel3/Tbl.fir index e7397f61..013fd098 100644 --- a/test/chisel3/Tbl.fir +++ b/test/chisel3/Tbl.fir @@ -11,9 +11,9 @@ circuit Tbl : cmem m : UInt<10>[256] o := UInt<1>(0) when we : - accessor T_13 = m[i] + infer accessor T_13 = m[i] node T_14 = bits(d, 9, 0) T_13 := T_14 else : - accessor T_15 = m[i] + infer accessor T_15 = m[i] o := T_15 |
