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| author | azidar | 2015-07-07 10:13:29 -0700 |
|---|---|---|
| committer | azidar | 2015-07-14 11:29:55 -0700 |
| commit | d696dd01de8a1a83a376c719490f475be991f387 (patch) | |
| tree | ca5d8f21c0f7787cc6eb00e078f0c0ae1e20a182 /test/chisel3/Rom.fir | |
| parent | 3c8f283b445ca99d4ed4c1e04e2bc8bdcdbd72f6 (diff) | |
Pass most tests. The ones that do not pass are not expected to, yet
Diffstat (limited to 'test/chisel3/Rom.fir')
| -rw-r--r-- | test/chisel3/Rom.fir | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/chisel3/Rom.fir b/test/chisel3/Rom.fir index 1c19d9b3..f91593a4 100644 --- a/test/chisel3/Rom.fir +++ b/test/chisel3/Rom.fir @@ -23,5 +23,5 @@ circuit Rom : r[13] := UInt<5>(26) r[14] := UInt<5>(28) r[15] := UInt<5>(30) - accessor T_39 = r[addr] + infer accessor T_39 = r[addr] out := T_39 |