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| author | azidar | 2015-07-07 10:13:29 -0700 |
|---|---|---|
| committer | azidar | 2015-07-07 10:13:29 -0700 |
| commit | df4bae5c7a95d3a56f95d86212f083b7ba121da7 (patch) | |
| tree | af46f090557734528d9d29fcf499d73024c575ac /test/chisel3/Rom.fir | |
| parent | c8d1fc06443e81374b1af95e17e3ecbecf863700 (diff) | |
Pass most tests. The ones that do not pass are not expected to, yet
Diffstat (limited to 'test/chisel3/Rom.fir')
| -rw-r--r-- | test/chisel3/Rom.fir | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/chisel3/Rom.fir b/test/chisel3/Rom.fir index 1c19d9b3..f91593a4 100644 --- a/test/chisel3/Rom.fir +++ b/test/chisel3/Rom.fir @@ -23,5 +23,5 @@ circuit Rom : r[13] := UInt<5>(26) r[14] := UInt<5>(28) r[15] := UInt<5>(30) - accessor T_39 = r[addr] + infer accessor T_39 = r[addr] out := T_39 |