diff options
| author | azidar | 2015-07-07 10:13:29 -0700 |
|---|---|---|
| committer | azidar | 2015-07-14 11:29:55 -0700 |
| commit | d696dd01de8a1a83a376c719490f475be991f387 (patch) | |
| tree | ca5d8f21c0f7787cc6eb00e078f0c0ae1e20a182 /test/chisel3/Mul.fir | |
| parent | 3c8f283b445ca99d4ed4c1e04e2bc8bdcdbd72f6 (diff) | |
Pass most tests. The ones that do not pass are not expected to, yet
Diffstat (limited to 'test/chisel3/Mul.fir')
| -rw-r--r-- | test/chisel3/Mul.fir | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/chisel3/Mul.fir b/test/chisel3/Mul.fir index c5dccb6f..b80b8a83 100644 --- a/test/chisel3/Mul.fir +++ b/test/chisel3/Mul.fir @@ -26,5 +26,5 @@ circuit Mul : tbl[15] := UInt<4>(9) node T_42 = shl(x, 2) node T_43 = bit-or(T_42, y) - accessor T_44 = tbl[T_43] + infer accessor T_44 = tbl[T_43] z := T_44 |