diff options
| author | azidar | 2015-05-21 13:18:09 -0400 |
|---|---|---|
| committer | azidar | 2015-05-21 13:18:09 -0400 |
| commit | eb125225cb96875f31a9af0db187406782b75223 (patch) | |
| tree | a37566e307424a277a3d2fe229f069cbbcca4ae4 /test/chisel3/LFSR16.fir | |
| parent | 81905d9fdd0debe8f666658607c2a20728baa86d (diff) | |
Added pad pass, used for flo backend
Diffstat (limited to 'test/chisel3/LFSR16.fir')
| -rw-r--r-- | test/chisel3/LFSR16.fir | 28 |
1 files changed, 13 insertions, 15 deletions
diff --git a/test/chisel3/LFSR16.fir b/test/chisel3/LFSR16.fir index b635e4bf..cdf1b835 100644 --- a/test/chisel3/LFSR16.fir +++ b/test/chisel3/LFSR16.fir @@ -1,24 +1,22 @@ -; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s -; CHECK: Done! +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +;CHECK: Done! circuit LFSR16 : module LFSR16 : output out : UInt<16> input inc : UInt<1> - node T_16 = UInt<16>(1) reg res : UInt<16> - on-reset res := T_16 + on-reset res := UInt<16>(1) when inc : - node T_17 = bit(res, 0) - node T_18 = bit(res, 2) - node T_19 = bit-xor(T_17, T_18) - node T_20 = bit(res, 3) - node T_21 = bit-xor(T_19, T_20) - node T_22 = bit(res, 5) - node T_23 = bit-xor(T_21, T_22) - node T_24 = bits(res, 15, 1) - node T_25 = cat(T_23, T_24) - res := T_25 + node T_16 = bit(res, 0) + node T_17 = bit(res, 2) + node T_18 = bit-xor(T_16, T_17) + node T_19 = bit(res, 3) + node T_20 = bit-xor(T_18, T_19) + node T_21 = bit(res, 5) + node T_22 = bit-xor(T_20, T_21) + node T_23 = bits(res, 15, 1) + node T_24 = cat(T_22, T_23) + res := T_24 out := res - |