Updated parser to correctly read empty statements

1 files changed, 9 insertions, 6 deletions

diff --git a/test/chisel3/GCD.fir b/test/chisel3/GCD.fir
index 5b103a6b..35da1802 100644
--- a/test/chisel3/GCD.fir
+++ b/test/chisel3/GCD.fir
@@ -1,3 +1,5 @@
+;RUN: firrtl %s abcefghipjklmno c | tee %s.out | FileCheck %s
+;CHECK: To Flo
 circuit GCD : 
   module GCD : 
     input b : UInt(16)
@@ -8,17 +10,18 @@ circuit GCD :
     
     reg x : UInt(16)
     reg y : UInt(16)
-    node T_17 : UInt(1) = greater(x, y)
+    node T_17 = gt(x, y)
     when T_17 : 
-      node T_18 : UInt = sub-mod(x, y)
+      node T_18 = sub-wrap(x, y)
       x := T_18
      else : 
-      node T_19 : UInt = sub-mod(y, x)
+      node T_19 = sub-wrap(y, x)
       y := T_19
     when e : 
       x := a
       y := b
     z := x
-    node T_20 : UInt(1) = UInt(0, 1)
-    node T_21 : UInt(1) = equal(y, T_20)
-    v := T_21
\ No newline at end of file
+    node T_20 = UInt(0, 1)
+    node T_21 = equal(y, T_20)
+    v := T_21
+;CHECK: Finished To Flo