Add ability to emit 1 file per module (#443)

Changes Emitters to also be Transforms and use Annotations for both
telling an emitter to do emission as well as getting the emitted result.
Helper functions ease the use of the new interface. Also adds a
FirrtlExecutionOptions field as well as a command-line option. Use of 
Writers in Compilers and Emitters is now deprecated.

2 files changed, 5 insertions, 14 deletions

diff --git a/src/test/scala/firrtlTests/transforms/BlacklBoxSourceHelperSpec.scala b/src/test/scala/firrtlTests/transforms/BlacklBoxSourceHelperSpec.scala
index b037accf..8cd51b2a 100644
--- a/src/test/scala/firrtlTests/transforms/BlacklBoxSourceHelperSpec.scala
+++ b/src/test/scala/firrtlTests/transforms/BlacklBoxSourceHelperSpec.scala
@@ -2,8 +2,6 @@
 
 package firrtlTests.transforms
 
-import java.io.StringWriter
-
 import firrtl.annotations.{Annotation, CircuitName, ModuleName}
 import firrtl.transforms._
 import firrtl.{AnnotationMap, FIRRTLException, Transform, VerilogCompiler}
@@ -80,13 +78,12 @@ class BlacklBoxSourceHelperTransformSpec extends LowTransformSpec {
 
   "annotated external modules" should "appear in output directory" in {
 
-    val writer = new StringWriter()
     val aMap = AnnotationMap(Seq(
       Annotation(moduleName, classOf[BlackBoxSourceHelper], BlackBoxTargetDir("test_run_dir").serialize),
       Annotation(moduleName, classOf[BlackBoxSourceHelper], BlackBoxResource("/blackboxes/AdderExtModule.v").serialize)
     ))
 
-    execute(writer, aMap, input, output)
+    execute(aMap, input, output)
 
     new java.io.File("test_run_dir/AdderExtModule.v").exists should be (true)
     new java.io.File(s"test_run_dir/${BlackBoxSourceHelper.FileListName}").exists should be (true)
diff --git a/src/test/scala/firrtlTests/transforms/DedupTests.scala b/src/test/scala/firrtlTests/transforms/DedupTests.scala
index 62015388..7148dd11 100644
--- a/src/test/scala/firrtlTests/transforms/DedupTests.scala
+++ b/src/test/scala/firrtlTests/transforms/DedupTests.scala
@@ -3,8 +3,6 @@
 package firrtlTests
 package transform
 
-import java.io.StringWriter
-
 import org.scalatest.FlatSpec
 import org.scalatest.Matchers
 import org.scalatest.junit.JUnitRunner
@@ -48,9 +46,8 @@ class DedupModuleTests extends HighTransformSpec {
            |    output x: UInt<1>
            |    x <= UInt(1)
            """.stripMargin
-      val writer = new StringWriter()
       val aMap = new AnnotationMap(Nil)
-      execute(writer, aMap, input, check)
+      execute(aMap, input, check)
    }
    "The module A and B" should "be deduped" in {
       val input =
@@ -86,9 +83,8 @@ class DedupModuleTests extends HighTransformSpec {
            |    output x: UInt<1>
            |    x <= UInt(1)
            """.stripMargin
-      val writer = new StringWriter()
       val aMap = new AnnotationMap(Nil)
-      execute(writer, aMap, input, check)
+      execute(aMap, input, check)
    }
    "The module A and B with comments" should "be deduped" in {
       val input =
@@ -124,9 +120,8 @@ class DedupModuleTests extends HighTransformSpec {
            |    output x: UInt<1>
            |    x <= UInt(1)
            """.stripMargin
-      val writer = new StringWriter()
       val aMap = new AnnotationMap(Nil)
-      execute(writer, aMap, input, check)
+      execute(aMap, input, check)
    }
    "The module B, but not A, with comments" should "be deduped if not annotated" in {
       val input =
@@ -153,9 +148,8 @@ class DedupModuleTests extends HighTransformSpec {
            |    output x: UInt<1> @[xx 1:1]
            |    x <= UInt(1)
            """.stripMargin
-      val writer = new StringWriter()
       val aMap = new AnnotationMap(Seq(NoDedupAnnotation(ModuleName("A", CircuitName("Top")))))
-      execute(writer, aMap, input, check)
+      execute(aMap, input, check)
    }
 }