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| author | Jack Koenig | 2020-01-07 21:12:22 -0800 |
|---|---|---|
| committer | GitHub | 2020-01-07 21:12:22 -0800 |
| commit | a4f2eda0ca312f80f43f89a764622aa744f9f84b (patch) | |
| tree | f4371d28afe92712a8307ebc3473fc6c9d84584c /src/test/scala/firrtlTests/StringSpec.scala | |
| parent | d5dd427c0267dc143d4297d5fd0716f19cd7634b (diff) | |
| parent | 0a5b90fff540f3d82cc5b16db0bf2ff83e9dd760 (diff) | |
Merge pull request #1259 from freechipsproject/cleanup-testing-console
Cleanup testing console
Diffstat (limited to 'src/test/scala/firrtlTests/StringSpec.scala')
| -rw-r--r-- | src/test/scala/firrtlTests/StringSpec.scala | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/test/scala/firrtlTests/StringSpec.scala b/src/test/scala/firrtlTests/StringSpec.scala index 208d9e6c..aaf2a584 100644 --- a/src/test/scala/firrtlTests/StringSpec.scala +++ b/src/test/scala/firrtlTests/StringSpec.scala @@ -23,8 +23,8 @@ class PrintfSpec extends FirrtlPropSpec { val harness = new File(testDir, s"top.cpp") copyResourceToFile(cppHarnessResourceName, harness) - verilogToCpp(prefix, testDir, Seq(), harness).! - cppToExe(prefix, testDir).! + verilogToCpp(prefix, testDir, Seq(), harness) #&& + cppToExe(prefix, testDir) ! loggingProcessLogger // Check for correct Printf: // Count up from 0, match decimal, hex, and binary |