diff options
| author | Jack Koenig | 2019-08-19 23:45:07 -0700 |
|---|---|---|
| committer | GitHub | 2019-08-19 23:45:07 -0700 |
| commit | d1a682f47935009215f56664cefae0de26e2eabf (patch) | |
| tree | 2dac347abf87dcfd0018cb4e42d563c2bd78050d /src/test/scala/firrtlTests/RenameMapSpec.scala | |
| parent | 0f6b9615213a2a9770974ff71b3da3f6b770a772 (diff) | |
Refactor exceptions to remove stack trace from user errors (#1157)
Diffstat (limited to 'src/test/scala/firrtlTests/RenameMapSpec.scala')
| -rw-r--r-- | src/test/scala/firrtlTests/RenameMapSpec.scala | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/test/scala/firrtlTests/RenameMapSpec.scala b/src/test/scala/firrtlTests/RenameMapSpec.scala index 3e569dcd..3241db16 100644 --- a/src/test/scala/firrtlTests/RenameMapSpec.scala +++ b/src/test/scala/firrtlTests/RenameMapSpec.scala @@ -3,11 +3,8 @@ package firrtlTests import firrtl.RenameMap -import firrtl.FIRRTLException import firrtl.RenameMap.IllegalRenameException import firrtl.annotations._ -import firrtl.annotations.Target -import firrtl.annotations.TargetToken.{Instance, OfModule} class RenameMapSpec extends FirrtlFlatSpec { val cir = CircuitTarget("Top") |