add emitter for optimized low firrtl (#2304)

* rearrange passes to enable optimized firrtl emission

* Support ConstProp on padded arguments to comparisons with literals

* Move shr legalization logic into ConstProp

Continue calling ConstProp of shr in Legalize.

Co-authored-by: Jack Koenig <koenig@sifive.com>

Co-authored-by: Jack Koenig <koenig@sifive.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/src/test/scala/firrtlTests/RemoveWiresSpec.scala b/src/test/scala/firrtlTests/RemoveWiresSpec.scala
index 58d42710..4022b267 100644
--- a/src/test/scala/firrtlTests/RemoveWiresSpec.scala
+++ b/src/test/scala/firrtlTests/RemoveWiresSpec.scala
@@ -98,7 +98,7 @@ class RemoveWiresSpec extends FirrtlFlatSpec {
     val (nodes, wires) = getNodesAndWires(result.circuit)
     wires.size should be(0)
     nodes.map(_.serialize) should be(
-      Seq("""node w = pad(UInt<2>("h2"), 8)""")
+      Seq("""node w = UInt<8>("h2")""")
     )
   }