Add ability to emit 1 file per module (#443)

Changes Emitters to also be Transforms and use Annotations for both
telling an emitter to do emission as well as getting the emitted result.
Helper functions ease the use of the new interface. Also adds a
FirrtlExecutionOptions field as well as a command-line option. Use of 
Writers in Compilers and Emitters is now deprecated.

1 files changed, 9 insertions, 28 deletions

diff --git a/src/test/scala/firrtlTests/PassTests.scala b/src/test/scala/firrtlTests/PassTests.scala
index c417c4fb..df56c097 100644
--- a/src/test/scala/firrtlTests/PassTests.scala
+++ b/src/test/scala/firrtlTests/PassTests.scala
@@ -9,50 +9,28 @@ import org.scalatest.junit.JUnitRunner
 import firrtl.ir.Circuit
 import firrtl.Parser.UseInfo
 import firrtl.passes.{Pass, PassExceptions, RemoveEmpty}
-import firrtl.{
-   Transform,
-   AnnotationMap,
-   PassBasedTransform,
-   CircuitState,
-   CircuitForm,
-   ChirrtlForm,
-   HighForm,
-   MidForm,
-   LowForm,
-   SimpleRun,
-   ChirrtlToHighFirrtl,
-   IRToWorkingIR,
-   ResolveAndCheck,
-   HighFirrtlToMiddleFirrtl,
-   MiddleFirrtlToLowFirrtl,
-   FirrtlEmitter,
-   Compiler,
-   Parser
-}
-
+import firrtl._
 
 // An example methodology for testing Firrtl Passes
 // Spec class should extend this class
 abstract class SimpleTransformSpec extends FlatSpec with Matchers with Compiler with LazyLogging {
-   def emitter = new FirrtlEmitter
-
    // Utility function
    def parse(s: String): Circuit = Parser.parse(s.split("\n").toIterator, infoMode = UseInfo)
    def squash(c: Circuit): Circuit = RemoveEmpty.run(c)
 
    // Executes the test. Call in tests.
-   def execute(writer: Writer, annotations: AnnotationMap, input: String, check: String): Unit = {
-      compile(CircuitState(parse(input), ChirrtlForm, Some(annotations)), writer)
-      val actual = RemoveEmpty.run(parse(writer.toString)).serialize
+   def execute(annotations: AnnotationMap, input: String, check: String): Unit = {
+      val finalState = compileAndEmit(CircuitState(parse(input), ChirrtlForm, Some(annotations)))
+      val actual = RemoveEmpty.run(parse(finalState.getEmittedCircuit.value)).serialize
       val expected = parse(check).serialize
       logger.debug(actual)
       logger.debug(expected)
       (actual) should be (expected)
    }
    // Executes the test, should throw an error
-   def failingexecute(writer: Writer, annotations: AnnotationMap, input: String): Exception = {
+   def failingexecute(annotations: AnnotationMap, input: String): Exception = {
       intercept[PassExceptions] {
-         compile(CircuitState(parse(input), ChirrtlForm, Some(annotations)), writer)
+         compile(CircuitState(parse(input), ChirrtlForm, Some(annotations)), Seq.empty)
       }
    }
 }
@@ -65,6 +43,7 @@ class CustomResolveAndCheck(form: CircuitForm) extends PassBasedTransform {
 }
 
 trait LowTransformSpec extends SimpleTransformSpec {
+   def emitter = new LowFirrtlEmitter
    def transform: Transform
    def transforms = Seq(
       new ChirrtlToHighFirrtl(),
@@ -78,6 +57,7 @@ trait LowTransformSpec extends SimpleTransformSpec {
 }
 
 trait MiddleTransformSpec extends SimpleTransformSpec {
+   def emitter = new MiddleFirrtlEmitter
    def transform: Transform
    def transforms = Seq(
       new ChirrtlToHighFirrtl(),
@@ -90,6 +70,7 @@ trait MiddleTransformSpec extends SimpleTransformSpec {
 }
 
 trait HighTransformSpec extends SimpleTransformSpec {
+   def emitter = new HighFirrtlEmitter
    def transform: Transform
    def transforms = Seq(
       new ChirrtlToHighFirrtl(),