aboutsummaryrefslogtreecommitdiff
path: root/src/test/scala/firrtlTests/InlineInstancesTests.scala
diff options
context:
space:
mode:
authorAdam Izraelevitz2018-10-30 19:30:03 -0700
committerGitHub2018-10-30 19:30:03 -0700
commit0a4bcaa4053aca16f21f899ba76b1b751cfb47b3 (patch)
treedf4ded76ea4c0e448f4839c6fc8838799263dea0 /src/test/scala/firrtlTests/InlineInstancesTests.scala
parent1e89e41604c9925c7de89eb85c7d7d0fa48e1e08 (diff)
Instance Annotations (#926)
Formerly #865 Major Code Changes/Features Added: Added Target trait as replacement for Named Added TargetToken as token in building Target Added GenericTarget as a catch-all Target Added CircuitTarget, ModuleTarget, ReferenceTarget, and InstanceTarget Added ResolvePaths annotation Added EliminateTargetPaths (and helper class DuplicationHelper) Updated Dedup to work with instance annotations Updated RenameMap to work with instance annotations DCE & ConstantProp extend ResolveAnnotationPaths
Diffstat (limited to 'src/test/scala/firrtlTests/InlineInstancesTests.scala')
-rw-r--r--src/test/scala/firrtlTests/InlineInstancesTests.scala37
1 files changed, 37 insertions, 0 deletions
diff --git a/src/test/scala/firrtlTests/InlineInstancesTests.scala b/src/test/scala/firrtlTests/InlineInstancesTests.scala
index 6d386d48..4affd64d 100644
--- a/src/test/scala/firrtlTests/InlineInstancesTests.scala
+++ b/src/test/scala/firrtlTests/InlineInstancesTests.scala
@@ -346,6 +346,43 @@ class InlineInstancesTests extends LowTransformSpec {
| b <= a""".stripMargin
failingexecute(input, Seq(inline("A")))
}
+
+ "Jack's Bug" should "not fail" in {
+
+ val input = """circuit Top :
+ | module Top :
+ | input a : UInt<32>
+ | output b : UInt<32>
+ | inst i of Inline
+ | i.a <= a
+ | b <= i.b
+ | module Inline :
+ | input a : UInt<32>
+ | output b : UInt<32>
+ | inst child of InlineChild
+ | child.a <= a
+ | b <= child.b
+ | module InlineChild :
+ | input a : UInt<32>
+ | output b : UInt<32>
+ | b <= a""".stripMargin
+ val check = """circuit Top :
+ | module Top :
+ | input a : UInt<32>
+ | output b : UInt<32>
+ | wire i_a : UInt<32>
+ | wire i_b : UInt<32>
+ | inst i_child of InlineChild
+ | i_b <= i_child.b
+ | i_child.a <= i_a
+ | b <= i_b
+ | i_a <= a
+ | module InlineChild :
+ | input a : UInt<32>
+ | output b : UInt<32>
+ | b <= a""".stripMargin
+ execute(input, check, Seq(inline("Inline")))
+ }
}
// Execution driven tests for inlining modules