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authorazidar2015-04-16 10:30:10 -0700
committerazidar2015-04-16 10:30:10 -0700
commit5dfc741fd04c7fa357b976b57086d67244d3d22a (patch)
tree12abeb786e5c1bc188c89e3476066e341509a7dd /src/main/stanza/passes.stanza
parentf742fe90ab7f56fb5c7b7022956ba68a2a60a8f5 (diff)
parentbd9eaea8a6ba91ad77988cd82e89c058ad05ef2a (diff)
Merge branch 'CuppoJava-master'
Diffstat (limited to 'src/main/stanza/passes.stanza')
-rw-r--r--src/main/stanza/passes.stanza26
1 files changed, 13 insertions, 13 deletions
diff --git a/src/main/stanza/passes.stanza b/src/main/stanza/passes.stanza
index 664b0a1f..aa940ceb 100644
--- a/src/main/stanza/passes.stanza
+++ b/src/main/stanza/passes.stanza
@@ -1,8 +1,8 @@
-defpackage firrtl.passes :
+defpackage firrtl/passes :
import core
import verse
- import firrtl.ir2
- import firrtl.ir-utils
+ import firrtl/ir2
+ import firrtl/ir-utils
import widthsolver
import firrtl-main
@@ -36,27 +36,27 @@ public val BI-GENDER = new Gender
defstruct WRef <: Expression :
name: Symbol
- type: Type [multi => false]
+ type: Type with: (as-method => true)
kind: Kind
- gender: Gender [multi => false]
+ gender: Gender with: (as-method => true)
defstruct WRegInit <: Expression :
reg: Expression
name: Symbol
- type: Type [multi => false]
- gender: Gender [multi => false]
+ type: Type with: (as-method => true)
+ gender: Gender with: (as-method => true)
defstruct WSubfield <: Expression :
exp: Expression
name: Symbol
- type: Type [multi => false]
- gender: Gender [multi => false]
+ type: Type with: (as-method => true)
+ gender: Gender with: (as-method => true)
defstruct WIndex <: Expression :
exp: Expression
value: Int
- type: Type [multi => false]
- gender: Gender [multi => false]
+ type: Type with: (as-method => true)
+ gender: Gender with: (as-method => true)
defstruct WDefAccessor <: Stmt :
name: Symbol
@@ -893,10 +893,10 @@ defn lower-module (m:Module,table:HashTable<Symbol,List<KeyValue<Expression,Flip
(s:DefWire) : table[name(s)] = get-entries(name(s),type(s))
(s:DefRegister) :
val regs = get-entries(name(s),type(s))
- val init-sym = symbol-join([name(s),`.init])
+ val init-sym = symbol-join([name(s),`\|.init|])
val init-regs = for r in regs map :
val [e f] = [key(r) value(r)]
- WRegInit(e,symbol-join([name(e),`.init]),type(e),gender(e)) => f
+ WRegInit(e,symbol-join([name(e),`\|.init|]),type(e),gender(e)) => f
table[name(s)] = regs
table[init-sym] = init-regs
(s:DefInstance) :